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US 10,120,815 B2Granted
Configurable mailbox data buffer apparatus
AssigneeMicrochip Technology Incorporated
InventorsMichael Catherwood, David Mickey, Bryan Kris
Life of this patent
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AssigneeMicrochip Technology Incorporated
InventorsMichael Catherwood, David Mickey, Bryan Kris
Estimating the term…
A single chip microcontroller has a master core and at least one slave core. The master core is clocked by a master system clock and the slave core is clocked by a slave system clock and wherein each core is associated with a plurality of peripheral devices to form a master microcontroller and a slave microcontroller, respectively. A communication interface is provided between the master microcontroller and the slave microcontroller, wherein the communication interface has a plurality of configurable directional data registers coupled with a flow control logic which is configurable to assign a direction to each of the plurality of configurable data registers.
A single chip microcontroller comprising a master core and a slave core, wherein the master core is clocked by a master system clock and the slave core is clocked by a slave system clock and wherein each core is associated with a plurality of peripheral devices to form a master microcontroller and a slave microcontroller, respectively, further comprising a communication interface between the master microcontroller and the slave microcontroller, wherein the communication interface comprises a plurality of configurable directional data registers coupled with a flow control logic which is configurable to assign a direction to each of the plurality of configurable data registers, and further comprising fuses or configuration registers to configure each directional data registers.
A method for providing communication between a master core and a slave core on a single chip microcontroller, wherein the master core is clocked by a master system clock and the slave core is clocked by a slave system clock and wherein each core is associated with a plurality of peripheral devices to form a master microcontroller and a slave microcontroller, respectively, the method comprising:
Dependencies are inferred from the claim text.