Manipulation of virtual memory page table entries to form virtually-contiguous memory corresponding to non-contiguous real memory allocations

A computer program product embodied in a non-transitory computer readable medium, the non-transitory computer readable medium having stored thereon a sequence of instructions which, when stored in memory and executed by a processor causes the processor to perform a set of acts for performing virtual paging register remap operations to manipulate a set of two or more contiguous paging registers to map them onto contiguous addresses of virtual address spaces, the set of acts comprising:

• maintaining a paging register structure of a cache management system, the paging register structure having a set of paging, each paging register in the set of paging registers comprising a first portion and a second portion, the first portion of at least one of the paging registers in the paging register structure holding a virtual address for a virtual memory, the second portion of the at least one of the paging registers holding a physical address for a physical memory for the virtual address stored in the first portion of the same paging register, the paging registers of the set of paging registers being arranged contiguously within the paging register structure such that the set of paging registers form a sequence of paging registers, and wherein entries in the paging registers are arranged based upon an increasing or decreasing order of virtual addresses in corresponding first portions of the paging registers;
• managing paging table data using the paging register structure to map virtual addresses to physical addresses for a virtual address space, at least by:
• initializing a first paging register of the set of paging registers by writing a first virtual address in the first portion of the first paging register and a first physical address of a first physical memory segment in the second portion of the first paging register, the first paging register associating the first virtual address with the first physical memory segment of the virtual address space;
• receiving a request to allocate a second physical memory segment to a second virtual address, the second physical memory segment corresponding to a second physical address;
• determining that the second virtual address corresponds to the virtual address space and is contiguous with the first virtual address stored in the first portion of the first paging register;
• allocating the second physical memory segment by:
• identifying a second paging register that is contiguous to the first paging register;
• determining that the first portion of the second paging register is populated with a third virtual address that is non-contiguous with the first virtual address in the first portion of the first paging register;
• moving contents of the second paging register into a third paging register by writing the third virtual address stored in the first portion of the second paging register to the first portion of the third paging register and by writing a third physical memory address in the second portion of the second paging register to the second portion of the third paging register;
• and
• storing the second virtual address into the second paging register by writing the second virtual address in the first portion of the second paging register and the second physical address in the second portion of the second paging register;
• and
• receiving a memory access request to the first virtual address stored in the first portion of the first paging register;
• servicing the memory access request by at least accessing the first physical memory address stored in the second portion of the first paging register;
• and
• prefetching data at the second physical memory segment using the second physical address stored in the second portion of the second paging register as a result of receiving the memory access request to the first virtual address.

A system that performs virtual paging register remap operations to manipulate a set of two or more contiguous paging registers to map them onto contiguous addresses of virtual address spaces, the system comprising:

• a storage medium having stored thereon a sequence of instructions;
• and
• a processor or processors that execute the sequence of instructions to cause the processor or processors to perform a set of acts, the set of acts comprising,
• maintaining a paging register structure of a cache management system, the paging register structure having a set of paging registers, each paging register in the set of paging registers comprising a first portion and a second portion, the first portion of at least one of the paging registers in the paging register structure holding a virtual address for a virtual memory, the second portion of the at least one of the paging registers holding a physical address for a physical memory for the virtual address stored in the first portion of the same paging register, the paging registers of the set of paging registers being arranged contiguously within the paging register structure such that the set of paging registers form a sequence of paging registers, and wherein entries in the paging registers are arranged based upon an increasing or decreasing order of virtual addresses in corresponding first portions of the paging registers;
• managing paging table data using the paging register structure to map virtual addresses to physical addresses for a virtual address space, at least by:
• initializing a first paging register of the set of paging registers by writing a first virtual address in the first portion of the first paging register and a first physical address of a first physical memory segment in the second portion of the first paging register, the first paging register associating the first virtual address with the first physical memory segment of the virtual address space;
• receiving a request to allocate a second physical memory segment to a second virtual address, the second physical memory segment corresponding to a second physical address;
• determining that the second virtual address corresponds to the virtual address space and is contiguous with the first virtual address stored in the first portion of the first paging register;
• allocating the second physical memory segment by:
• identifying a second paging register that is contiguous to the first paging register;
• determining that the first portion of the second paging register is populated with a third virtual address that is non-contiguous with the first virtual address in the first portion of the first paging register;
• moving contents of the second paging register into a third paging register by writing the third virtual address stored in the first portion of the second paging register to the first portion of the third paging register and by writing a third physical memory address in the second portion of the second paging register to the second portion of the third paging register;
• and
• storing the second virtual address into the second paging register by writing the second virtual address in the first portion of the second paging register and the second physical address in the second portion of the second paging register;
• and
• receiving a memory access request to the first virtual address stored in the first portion of the first paging register;
• servicing the memory access request by at least accessing the first physical memory address stored in the second portion of the first paging register;
• and
• prefetching data at the second physical memory segment using the second physical address stored in the second portion of the second paging register as a result of receiving the memory access request to the first virtual address.