Managing memory for secure enclaves

A system comprising:

• a memory;
• and
• a conflict resolution logic circuit coupled to the memory to:
• initiate a tracking phase to track translation look aside buffer (TLB) mappings to an enclave memory cache (EPC) page of a secure enclave;
• execute a tracking instruction as part of the tracking phase, wherein the tracking instruction takes any page in the secure enclave as an argument parameter to the tracking instruction;
• and
• determine that a tracking instruction error is generated by the tracking instruction, wherein the tracking instruction error is encountered by a guest operating system (OS) of a virtual machine (VM).

A non-transitory machine-readable storage medium including instructions that, when accessed by a processing device, cause the processing device to perform operations comprising:

• initiating, by a processing device, a tracking phase to track translation look aside buffer (TLB) mappings to an enclave memory cache (EPC) page of a secure enclave;
• and
• executing, by the processing device, a tracking instruction as part of the tracking phase, wherein the tracking instruction takes any page in the secure enclave as an argument parameter to the tracking instruction;
• and
• determining that a tracking instruction error is generated by the tracking instruction, wherein the tracking instruction error is encountered by a guest operating system (OS) of a virtual machine (VM).