Apparatus and methods for debugging on a memory device

An apparatus, comprising:

• a memory device, comprising:
• an array of memory cells;
• sensing circuitry coupled to the array, the sensing circuitry including a sense amplifier and a compute component configured to perform logical operations on the memory device;
• and
• a controller coupled to the array and sensing circuitry, the controller configured to cause the memory device to:
• store microcode instructions containing debugging code in the array of memory cells;
• execute microcode instructions to perform logical operations using the sensing circuitry;
• and
• detect one or more bits in the executing microcode instructions to halt a logical operation and perform a debugging routine according to the debugging code on the memory device.

An apparatus, comprising:

• a memory device having a bank arbiter coupled to a plurality of memory banks, the bank arbiter to dispatch microcode instructions to the plurality of banks, wherein each bank of the plurality of banks comprises:
• an array of memory cells;
• sensing circuitry coupled to the array, the sensing circuitry including a sense amplifier and a compute component configured to perform logical operations;
• and
• a controller coupled to the array and the sensing circuitry, wherein the controller is configured to:
• store debugging code in the array of memory cells;
• execute instructions to perform logical operations using the sensing circuitry;
• and
• receive an indication in the executing instructions to halt a logical operation and to execute the debugging code on the memory device.

A method for debugging on a memory device, comprising:

• storing microcode instructions containing debugging code in an array of memory cells;
• receiving microcode instructions to a controller on the memory device to perform logical operation;
• detecting an indication in the received microcode instructions to halt a logical operation and to perform a debugging routine according to the debugging;
• and
• executing microcode instructions on the memory device using sensing circuitry having a sense amplifier and a compute component to perform the logical operations.

An apparatus, comprising:

• a memory device, comprising:
• an array of memory cells;
• sensing circuitry coupled to the array, the sensing circuitry including a sense amplifier and a compute component configured to perform logical operations on the memory device;
• and
• a controller coupled to the array and sensing circuitry, the controller configured to cause the memory device to:
• store debugging code in the array of memory cells;
• execute instructions to perform logical operations using the sensing circuitry, wherein the instructions to perform the logical operations are stored in the array of memory cells;
• and
• receive an indication in the executing instructions to halt a logical operation and to execute the debugging code on the memory device, wherein the indication is a bit stored within the instructions to cause the controller to halt the logical operation.

An apparatus, comprising:

• a memory device, comprising:
• an array of memory cells;
• sensing circuitry coupled to the array, the sensing circuitry including a sense amplifier and a compute component configured to perform logical operations on the memory device;
• and
• a controller coupled to the array and sensing circuitry, the controller configured to cause the memory device to:
• store debugging code in the array of memory cells;
• execute instructions to perform logical operations using the sensing circuitry, wherein the instructions to perform the logical operations are stored in the array of memory cells;
• and
• receive an indication in the executing instructions to halt a logical operation and to execute the debugging code on the memory device, wherein the indication is stored within the instructions to perform the logical operations;
• and
• the indication is configured to cause the controller to;
• pause execution of a logical operation;
• and
• continue the logical operation according to the debugging code.

An apparatus, comprising:

• a memory device, comprising:
• an array of memory cells;
• sensing circuitry coupled to the array, the sensing circuitry including a sense amplifier and a compute component configured to perform logical operations on the memory device;
• and
• a controller coupled to the array and sensing circuitry, the controller configured to cause the memory device to:
• store debugging code in the array of memory cells;
• execute instructions to perform logical operations using the sensing circuitry;
• and
• receive an indication in the executing instructions to halt a logical operation and to execute the debugging code on the memory device, wherein the instructions are microcode instructions, and wherein the debugging code and the indication are contained in the microcode instructions.

A method for debugging on a memory device, comprising:

• storing microcode instructions containing debugging code in an array of memory cells;
• receiving microcode instructions to a controller on the memory device to perform logical operations;
• detecting an indication in the received microcode instructions to halt a logical operation and to perform a debugging routine according to the debugging;
• and
• setting a debug bit in the microcode instructions programmatically after the microcode instructions are stored on the memory device.

A method for debugging on a memory device, comprising:

• storing microcode instructions containing debugging code in an array of memory cells;
• receiving microcode instructions to a controller on the memory device to perform logical operations,
• detecting an indication in the received microcode instructions to halt a logical operation and to perform a debugging routine according to the debugging,
• executing microcode instructions on the memory device using sensing circuitry having a sense amplifier and a compute component to perform the logical operations, wherein the executing microcode instructions on the memory device includes executing the microcode instructions on a processing in memory (PIM) device;
• and
• using sensing circuitry on the PIM device to:
• perform logical functions including AND, OR, NOT, XOR, NAND, and NOR logical functions;
• and
• non-Boolean logic operations including copy, compare and erase.