Exclusion monitors
AssigneeFriday Harbor LLC
InventorsRicardo Jorge Lopez, Robert N. Hilton
Life of this patent
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Abstract
Systems, devices, and techniques for processor synchronization are described. A described system includes exclusion monitor circuitry, a content addressable memory (CAM) coupled with the exclusion monitor circuitry, and processors coupled with the exclusion monitor circuitry. The processors can perform synchronization via the exclusion monitor circuitry using an identifier tag. The exclusion monitor circuitry can utilize the CAM to store information for handling one or more named mutual exclusions. The exclusion monitor circuitry and the CAM can be configured to concurrently handle multiple identifier tags that correspond to different mutual exclusions.
Claims10
An apparatus comprising:
- exclusion monitor circuitry;
- a content addressable memory (CAM) coupled with the exclusion monitor circuitry, wherein the CAM is configured to store CAM entries, wherein a CAM entry of the CAM entries comprises a CAM tag and a release register;
- and
- processors coupled with the exclusion monitor circuitry, wherein the processors perform synchronization via the exclusion monitor circuitry using an identifier tag,
- wherein a first processor of the processors is configured to send a release request to the exclusion monitor circuitry, the release request comprising the identifier tag,
- wherein, in response to receiving the release request, the exclusion monitor circuitry is configured to perform a first lookup in the CAM based on the identifier tag of the release request,
- wherein the exclusion monitor circuitry is configured to, based on the first lookup missing in the CAM, write the identifier tag of the release request as the CAM tag in the CAM entry, mark the CAM entry as valid, write a processor identifier of the first processor in the release register of the CAM entry, and cause the first processor to enter a stalled state,
- wherein a second processor of the processors is configured to send an acquire request to the exclusion monitor circuitry, the acquire request comprising the identifier tag,
- wherein, in response to receiving the acquire request, the exclusion monitor circuitry is configured to perform a second lookup in the CAM based on the identifier tag of the acquire request, and
- wherein the exclusion monitor circuitry is configured to, based on the second lookup hitting in the CAM, issue a grant to the second processor and release the first processor from the stalled state using the processor identifier stored in the release register of the CAM entry.
A method for performing synchronization between processors, comprising:
- sending, by a first processor, a release request to exclusion monitor circuitry, wherein the release request comprises an identifier tag;
- performing, by the exclusion monitor circuitry in response to receiving the release request, a first lookup in a content addressable memory (CAM) based on the identifier tag of the release request;
- operating the exclusion monitor circuitry, based on the first lookup missing in the CAM, to write the identifier tag of the release request as a CAM tag in a CAM entry of the CAM, mark the CAM entry as valid, write a processor identifier of the first processor in a release register of the CAM entry, and cause the first processor to enter a stalled state;
- sending, by a second processor, an acquire request to the exclusion monitor circuitry, wherein the acquire request comprises the identifier tag;
- performing, by the exclusion monitor circuitry, a second lookup in the CAM based on the identifier tag of the acquire request;
- and
- operating the exclusion monitor circuitry, based on the second lookup hitting in the CAM, to issue a grant to the second processor, and to release the first processor from the stalled state using the processor identifier stored in the release register of the CAM entry.
Dependencies are inferred from the claim text.