Ferroelectric memory expansion for firmware updates

A method of updating content stored in a ferroelectric random access memory (FRAM) array in an integrated circuit, the FRAM array including memory cells arranged in rows and columns, each memory cell of the FRAM array operable as two-transistor two-capacitor (2T2C) memory cell in a normal operating mode, and as first and second one-transistor one-capacitor (1T1C) half-cells in an update mode, the method comprising:

• storing a first data set as complementary polarization states in each of a plurality of the memory cells;
• placing the FRAM array into the update mode;
• writing a second data set in the second half-cell of each of a selected plurality of the memory cells;
• verifying the second data set;
• responsive to successfully verifying the second data set, writing a logical compliment of the second data set into the first half-cell of each of the selected plurality of memory cells;
• and
• then placing the FRAM array into the normal operating mode.