Semiconductor device chip package with electronic switching using dedicated ground pin coupled to a virtual ground node

A semiconductor device comprising:

• a chip package including at least one semiconductor chip, a dedicated ground pin, a first supply pin for receiving a first supply voltage, a second supply pin for receiving a second supply voltage, a first input pin for receiving an input signal;
• a first circuit integrated in the semiconductor chip, the first circuit being coupled to the first supply pin and to the dedicated ground pin;
• and
• a second circuit integrated in the semiconductor chip, the second circuit being coupled to the first supply pin and to a virtual ground node,
• wherein the virtual ground node is at least temporarily connected to the first input pin, and
• wherein, when the virtual ground node is connected to the first input pin and the input signal received at the first input pin is at a low voltage level, a second supply current passes through the second circuit from the second supply pin to the virtual ground node, while a voltage drop across the second circuit substantially corresponds to the second supply voltage.

A bus transceiver circuit comprising:

• a transmitter portion configured to receive an input data signal and to generate a corresponding first bus signal operably applied to at least one bus line;
• the transmitter portion of the transceiver circuit being supplied with a first supply voltage and connected to a first ground pad;
• a receiver portion operably coupled to the at least one bus line to receive a second bus signal and configured to generate a corresponding receive signal;
• and
• an output buffer included in the receiver portion of the transceiver circuit, the output buffer receiving the receive signal and generating a corresponding output data signal, the output buffer being supplied with a second supply voltage and connected to a second ground pad that is separate from the first ground pad.

A transceiver device for interfacing with a data bus, the device comprising:

• a chip package having at least a first supply pin, a second supply pin, a ground pin, an input data pin, an output data pin, at least one bus pin for connecting at least one bus line, and a further pin;
• and
• a semiconductor chip including a receiver circuit and a transmitter circuit,
• wherein the transmitter circuit is configured to receive an input data signal at the input data pin and to provide a corresponding first bus signal at the at least one bus pin;
• the transmitter circuit being supplied with a first supply voltage applied at the first supply pin and being connected to the ground pin,
• wherein the receiver circuit is operably coupled to the at least one bus pin to receive a second bus signal and configured to generate a corresponding receive signal, and
• wherein the receiver circuit includes an output buffer that receives the receive signal and generates a corresponding output data signal at the output data pin, the output buffer being supplied with a second supply voltage applied at the second supply pin and being connected to a circuit node, which is configured to be connected to the further pin.

A method executed in a semiconductor device that comprises:

• a chip package including at least one semiconductor chip, a dedicated ground pin, a first supply pin for receiving a first supply voltage, a second supply pin for receiving a second supply voltage, and a first input pin;
• a first circuit integrated in the semiconductor chip, the first circuit being coupled to the first supply pin and to the dedicated ground pin;
• and
• a second circuit integrated in the semiconductor chip, the second circuit being coupled to the first supply pin and to a virtual ground node;
• wherein the method comprises:
• receiving a first input signal at the first input pin;
• and
• connecting, using an electronic switch, the virtual ground node with the first input pin dependent on a level of a first input signal.

A system comprising:

• a controller device comprising an output pin;
• and
• a semiconductor device, comprising:
• a chip package including at least one semiconductor chip, a dedicated ground pin, a first supply pin for receiving a first supply voltage, a second supply pin for receiving a second supply voltage, a first input pin connected to the output pin of the controller device;
• a first circuit integrated in the semiconductor chip, the first circuit being coupled to the first supply pin and to the dedicated ground pin;
• a second circuit integrated in the semiconductor chip, the second circuit being coupled to the first supply pin and to a virtual ground node;
• and
• an electronic switch configured to connect the virtual ground node with the first input pin dependent on a level of an input signal.