US 10,120,408 B2Granted

Event controlled clock switching

AssigneeTexas Instruments Incorporated

InventorsJoerg Harald Hans Jochen Schreiner, Marcus Herzog

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Abstract

A system and method for controlling clock generation. A system includes a processor configured to execute instructions retrieved from memory, and a clock generation system coupled to the processor. The clock generation system is configured to generate a clock signal that the processor applies to execute the instructions. The clock generation system includes a plurality of configuration registers and selection circuitry. Each of the configuration registers includes fields that control a frequency of the clock signal. The selection circuitry selects which of the plurality of configuration registers determines the frequency at a given time.

Claims20

Dependent claims

A system, comprising:

a processor configured to execute instructions retrieved from memory;
a clock generation system coupled to the processor and configured to generate a clock signal for the processor to apply to execute the instructions, the clock generation system comprising:
a plurality of configuration registers, each of the configuration registers comprising fields to control a frequency of the clock signal;
event association logic to receive an event signal that indicates an occurrence of an event within the system and to output a selection control signal selected from a plurality of selection control signals responsive to the receiving of the event signal indicating the occurrence of the event, wherein the event association logic includes a plurality of registers, wherein each of the plurality of registers of the event association logic stores initialization data that associates the register with a respective one of the plurality of selection control signals;
and
selection circuitry to receive the selected selection control signal and, responsive to the selected selection control signal, to associate a respective one of the configuration registers with the event occurring within the system by selecting which of the plurality of configuration registers determines the frequency of the clock signal;
wherein the clock generation system is configured to change the frequency of the clock signal during operation of the processor, and irrespective of instructions executed by the processor, and the initialization data stored in the plurality of registers of the event association logic is provided to the event association logic by the processor;
wherein events associated with the configuration registers include:
an interrupt to be serviced by the processor;
a completion of an interrupt service;
a change in a level of a signal at an input terminal of the processor;
and
a change in a mode of the processor responsive to the processor executing an instruction;
and
wherein the plurality of selection control signals includes:
a first selection control signal corresponding to the interrupt to be serviced by the processor;
a second selection control signal corresponding to the completion of the interrupt service;
a third selection control signal corresponding to the change in the level of the signal at the input terminal of the processor;
and
a fourth selection control signal corresponding to the change in the mode of the processor responsive to the processor executing the instruction.

17 more elements

An electronic data processing system, comprising:

a memory to store instructions;
a processor to execute the instructions retrieved from the memory;
a clock generation system coupled to the processor and configured to generate at least one clock signal for the processor to apply to execute the instructions, the clock generation system comprising:
a plurality of configuration registers, each of the configuration registers comprising fields to control a frequency of the at least one clock signal and each of the configuration registers being associated with a respective one of a plurality of events;
event association logic to receive an event signal that indicates an occurrence of one of the plurality of events within the system and, in response to the received event signal, output a selection control signal corresponding to the occurring event, the selection control signal being selected from a plurality of selection control signals;
selection circuitry having a plurality of inputs each coupled to a respective one of the configuration registers, wherein the selection circuitry is configured to receive the selection control signal and to select one of the configuration registers corresponding to the occurring event;
and
clock source circuitry to receive from the selection circuitry information contained in the selected configuration register and to output the at least one clock signal having a frequency determined by the information contained in the selected configuration register;
wherein events associated with the configuration registers include an interrupt to be serviced by the processor, a completion of an interrupt service, a change in a level of a signal at an input terminal of the processor, and a change in a mode of the processor responsive to the processor executing an instruction;
and
wherein the plurality of selection control signals includes a first selection control signal corresponding to the interrupt to be serviced by the processor, a second selection control signal corresponding to the completion of the interrupt service, a third selection control signal corresponding to the change in the level of the signal at the input terminal of the processor, and a fourth selection control signal corresponding to the change in the mode of the processor responsive to the processor executing the instruction.

8 more elements

Dependencies are inferred from the claim text.