Manufacturing method for TFT substrate and TFT substrate manufactured by the manufacturing method thereof

A manufacturing method for thin film transistor (TFT) substrate, which comprises:

• Step 1:
• providing a substrate, and then sequentially depositing a transparent conductive film and a light-shielding film on the substrate;
• Step 2:
• using a semi-permeable mask on the transparent conductive film and the light-shielding film for patterning process to obtain a transparent conductive layer and a common electrode spaced apart on the substrate, and a light-shielding layer over the transparent conductive layer with equal width and aligned at two ends;
• Step 3:
• depositing a buffer layer on the light-shielding layer, the common electrode, and the substrate, and then sequentially depositing an oxide semiconductor layer, an insulating layer, and a gate metal layer on the buffer layer;
• Step 4:
• using a mask on the gate metal layer and the insulating layer for patterning process to obtain a gate and a gate insulating layer with the same width and aligned at two ends;
• using the gate and the gate insulating layer as a shielding layer to perform ion doping on the oxide semiconductor layer to convert the region of the oxide semiconductor layer not covered by the gate and the gate insulating layer into oxide conductor;
• Step 5:
• using a mask on the oxide semiconductor layer for patterning process to form an active layer and a pixel electrode connected to the active layer;
• the active layer comprising a channel region underneath the gate, a drain contact region located at one side of the channel region, a connection area located at the other side of the channel region and connected to the pixel electrode;
• wherein the channel region of the active layer being made of an oxide semiconductor material, the drain contact region and the connection region of the active layer, and the pixel electrode being made of an oxide conductor;
• Step 6:
• depositing a first passivation layer on the gate, the active layer and the buffer layer, using a mask on the first passivation layer for patterning process to form a via on the first passivation layer corresponding to the drain contact region;
• and
• Step 7:
• depositing a drain metal layer on the first passivation layer, using a mask on the drain metal layer for patterning process to obtain a drain, the drain contacting the drain contact region of the active layer through the via, depositing a second passivation layer on the drain and the first passivation layer to form a TFT substrate;
• wherein Step 2 further comprising:
• Step 21:
• coating a photoresist layer on the light-shielding film, using a semi-permeable mask on the photoresist layer for patterning process to obtain a first photoresist section and a second photoresist section spaced apart;
• the first photoresist section having a thickness greater than the thickness of the second photoresist section;
• Step 22:
• using the first photoresist section and the second photoresist section as a stopping layer to perform etching on the transparent conductive film and the light-shielding film to obtain the light-shielding layer and the transparent conductive layer beneath the first photoresist section, and a light-shielding section and the common electrode underneath the second photoresist section;
• Step 23:
• performing an ashing treatment on the first and the second photoresist sections for thinning the first photoresist section and removing the second photoresist section;
• Step 24:
• using the first photoresist section as a stopping layer to perform etching on the light-shielding section to remove the light-shielding section;
• and
• Step 25:
• removing the remaining first photoresist section;
• wherein in Step 2, the semi-permeable mask being a gray tone mask, half tone mask or single slit mask.