Overclocked line rate for communication with PHY interfaces
AssigneeBroadcom Corporation
InventorsVelu Pillai, Vivek Telang
Life of this patent
Estimating the term…
Abstract
A system side interface of a PHY chip used in conjunction with a 100GBASE backplane, sends and receives data using an NRZ signal format, but at a data rate of between about 26.5 Gbps/per lane to 27.2 Gbps/per lane, which is consistent with the PAM 4 signaling protocol. Thus, chip-to-chip communications between a PHY chip and a switch or controller chip can use an “overclocked” NRZ signaling format, reducing the amount of logic needed, which in turn can reduce signal latency, and reduce the chip area and power consumption required to implement the logic.
Claims20
A PHY circuit for use as an interface between a system device and a backplane, the PHY circuit comprising:
- a system-side input configured to receive, from the system device, data encoded according to a first protocol at an overclocked signaling rate consistent with a second protocol different from the first protocol;
- at least one processing module configured to transcode the data from the first protocol to the second protocol without altering the overclocked signaling rate of the data;
- and
- a line-side output coupled to the backplane, and configured to transmit the data over the backplane using the second protocol and the overclocked signaling rate.
A PHY for use as an interface between a system device and a backplane, the PHY comprising:
- a system-side input configured to receive data from the system device, the data from the system device including forward-error-corrected (FEC) pulse amplitude modulation four (PAM4) data transmitted in multiple lanes using a non-return to zero (NRZ) signaling format with a data rate adjusted to conform to a PAM4 signaling rate rather than a standard NRZ signaling rate;
- at least one processing module configured to transcode the data from the system device into data blocks having a size compatible with PAM4, without changing the data rate, to generate backplane data;
- and
- a line-side output configured to transmit the backplane data via the backplane.
A method for use in a PHY, the method comprising:
- receiving, at an egress path of the PHY, data encoded according to a first protocol at a modified signaling rate consistent with a second protocol specifying the modified signaling rate;
- transcoding the data from the first protocol to the second protocol without altering the modified signaling rate of the data;
- and
- transmitting the data according to the second protocol at the modified signaling rate specified by the second protocol.
Dependencies are inferred from the claim text.