Abstract
A data processing system is provided with a flash memory including a plurality of blocks and capable of erasing stored data collectively in units of block and a memory control unit for accessing the flash memory, the memory control unit having a control circuit for formatting the flash memory according to a format information for substantially coinciding each cluster serving as a logical unit of memory region of the flash memory with integer ones of the blocks and a control circuit for determining a size and position of each cluster and carrying out access control for erasing, write-in and reading of data of the flash memory according to the size and position of the determined cluster.
Key facts
- Application
- 09/498,066Filed 4 Feb 2000 · continuation
- Priority
- JP 9-2089764 Aug 1997
- Granted
- 25 Jun 2002
- Term ends
- Not estimatedThe source records don’t support an estimate.
Classification6 codes
- G06F 3/0613
Improving I/O performance: in relation to throughput
- G06F 3/0611
Improving I/O performance: in relation to response time
- G06F 3/064
Organizing or formatting or addressing of data: management of blocks
- G06F 3/0652
Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems: erasing, e.g. deleting, data cleaning, moving…
Family
- PCT/JP98/02862Parent of this continuation · filed 25 Jun 1998
- US 6,411,552 B1This patent
From the US filing history. Foreign family members aren’t listed.