Image processor and display system having adaptive operational frequency range

A display system comprising:

• an image processor that generates frame data and identifies, when a frequency for updating frame data is less than a predetermined threshold, a first range of a first frequency at which the image processor operates but does not bound the first frequency by the first range until the frequency for updating the frame data equals or exceeds the predetermined threshold;
• a timing controller that generates a data driver control signal and a scan driver control signal based on the frame data;
• a display panel comprising a plurality of pixels;
• a data driver that generates a plurality of data signals based on the data driver control signal and outputs the data signals to the pixels through a plurality of data signal lines;
• and
• a scan driver that generates a plurality of scan signals based on the scan driver control signal and outputs the scan signals to the pixels through a plurality of scan signal lines.

A system comprising:

• a Central Processing Unit (CPU) that receives a frame per second signal indicating a number per second of frame update signal activations, operates in response to a first frequency, and generates a vertical synchronizing signal, a control signal, and a first data signal;
• a Graphics Processing Unit (GPU) that operates in response to a second frequency and generates a second data signal;
• and
• a multiplexer that receives the first data signal, the second data signal, and the control signal and selectively outputs either the first data signal or the second data signal in response to the control signal, wherein:
• the CPU comprises:
• a frame buffer that activates a frame update signal in response to a frame update command and outputs frame data;
• and
• a display controller that generates the frame update command based on the vertical synchronizing signal and the frame per second signal, and
• when the frame per second signal is less than a predetermined threshold value, the CPU identifies a first range of the first frequency but does not bound the first frequency by the first range until the frame per second signal equals or exceeds the predetermined threshold value.

An image processor comprising:

• a frame buffer that collects image data of pixels and generates frame data,
• wherein if the frame data is generated, the frame buffer activates a frame update signal and outputs the frame data in response to a frame update command;
• a display controller that generates the frame update command based on a vertical synchronizing signal and a frame per second signal, wherein the frame per second signal represents a number of activations per second of the frame update signal;
• and
• an operating part that generates the vertical synchronizing signal and the image data,
• wherein the operating part is configured to, based on a first value of the frame per second signal, identify a lower limit of a range of frequency of the operating part as a predetermined minimum frequency, and
• the operating part is configured to, after identifying the lower limit of the range of frequency as the predetermined minimum frequency, bound the frequency of the operating part by the lower limit based on a second value of the frame per second signal, wherein the second value of the frame per second signal is greater than the first value of the frame per second signal.

A system comprising:

• a Central Processing Unit (CPU) that receives a frame per second signal, operates in response to a first frequency, and generates a vertical synchronizing signal, a control signal, and a first data signal, wherein the frame per second signal represents a number of activations per second of a frame update signal;
• a Graphics Processing Unit (GPU) that operates in response to a second frequency and generates a second data signal;
• and
• a multiplexer that receives the first data signal, the second data signal, and the control signal, and selectively outputs either the first data signal or the second data signal in response to the control signal,
• wherein the CPU comprises
• a frame buffer that activates the frame update signal in response to a frame update command and outputs frame data;
• and
• a display controller that generates the frame update command based on the vertical synchronizing signal and the frame per second signal,
• wherein, when the frame per second signal is less than a predetermined threshold value, the CPU sets a lower limit of a range of the first frequency to a predetermined minimum frequency, and
• when the frame per second signal is greater than or equal to the predetermined threshold value, the CPU initiates the lower limit of the range of the first frequency.