Processor which can favorably execute a rounding process composed of positive conversion and saturated calculation processing

A processor that decodes and executes instructions,

• the processor comprising:
• first detecting unit for detecting whether an instruction to be decoded is an instruction performing a calculation;
• second detecting unit for detecting whether an instruction to be decoded is an instruction performing both a calculation and a rounding of the calculation result;
• calculating unit for performing, when the first detecting unit detects that the instruction performs a calculation, a calculation using a signed m-bit integer;
• and
• rounding unit for rounding, when the second detecting unit detects the instruction performing both a calculation and a rounding, a result of the calculation performed with a signed m-bit integer to a value expressed as an unsigned s-bit integer wherein s is less than m.

A program recording medium that enables a processor to decode and execute instructions comprising:

• first direction for directing the processor to detect whether an instruction to be decoded is an instruction for performing a calculation;
• second direction for directing the processor to detect whether an instruction to be decoded is an instruction performing both a calculation and a rounding of the calculation result;
• third direction for directing the processor to perform, when the processor detects that the instruction performs a calculation, a calculation using a signed m-bit integer;
• and
• fourth direction for directing the processor, when the processor is detecting an instruction performing both a calculation and a rounding, for rounding a result of the calculation performed with a signed m-bit integer to a value expressed as an unsigned s-bit integer wherein s is less than m.

A processor that decodes and executes instructions, the processor comprising:

• a detecting unit for detecting whether an instruction to be decoded is a predetermined instruction;
• and
• a rounding unit for rounding, when the detecting unit is detecting that the instruction is the predetermined instruction, a signed m-bit integer stored at an operand designated by the predetermined instruction to a value expressed as an unsigned s-bit integer, wherein
• s is less than m and the rounding of the rounding unit includes the following plural arithmetic operations which are performed within one cycle:
• (a) testing whether the signed m-bit integer is a negative number or not,
• (b) testing whether the signed m-bit integer exceeds a predetermined positive number or not, and
• (c) defining the value expressed as the unsigned s-bit integer in accordance with the testing results of (a) and (b).