US RE43,235 E1Granted

Single-block virtual frame buffer translated to multiple physical blocks for multi-block display refresh generator

AssigneeFaust Communications, LLC

InventorsTakatoshi Ishii, Edmund Cheung, Sherwood Brannon

Life of this patent

Estimating the term…

Loading patent…

Abstract

A graphics controller for a System-On-a-Chip (SOC) used with a battery-powered device allows for reduced-power display modes. The microprocessor writes to a frame buffer that is a single, contiguous address block in virtual memory. A memory management unit (MMU) translates frame-buffer address to multiple physical blocks. The graphics controller fetches pixels from the multiple physical blocks, including a block in an on-chip memory and a block in an external memory. In a low-power mode, pixels are only fetched from the lower-power on-chip memory and not the higher-power external memory. A smaller display window is defined and pixels outside the window are replaced by dummy data, .eliminating external-memory fetches. The smaller display window falls within the first block in the on-chip memory. Status and other information can be displayed in the smaller display window during stand-by modes, while a full-screen of data is displayed for full-power modes.

Claims28

Dependent claims

A multi-block display-refresh controller comprising:

a start address selector for selecting a block starting address from a plurality of block starting addresses and a screen starting address, the start address selector being loaded with a series of block starting addresses for a plurality of blocks within a display frame;
a selector, coupled to the start address selector, for selecting either the block starting address or a next-line address for output;
a line start register, coupled to receive an output of the selector, for storing a line starting address for a horizontal line of pixels in the display frame;
a memory address counter that is loaded with the line starting address from the line start register and incremented by a pixel clock as pixels in the horizontal line are written to a display;
an adder, receiving the line starting address from the line start register, for adding a line width to the line starting address to generate the next-line address to the selector;
a block-end detector, coupled to receive a pixel address from the memory address counter, for detecting a block end when the pixel address matches a block-end address for a current one of the plurality of blocks within the display frame;
and
wherein the selector selects a new block starting address from the start address selector when the block-end detector detects the block end, but the selector selects the next-line address from the adder when the block end is not detected by the block-end detector,
whereby new block starting address are used when block ends are detected as the plurality of blocks of pixels are displayed within a display frame.

6 more elements

A portable system comprising:

execute means for executing programs that write pixels for display to a single-block frame buffer;
frame-buffer-address translate means, receiving addresses of pixels from the execute means, for translating the addresses of pixels to memory addresses in a plurality of physical memory blocks;
low-power memory means for storing some of the plurality of physical memory blocks that store pixels;
high-power-memory access means for reading pixels stored in others of the plurality of physical memory blocks that are stored in an external memory;
wherein accesses of pixels stored in the external memory consume more power than accesses of pixels stored in the low-power memory means;
and
display controller means for writing pixels to a display, the display controller means reading pixels stored in the plurality of physical memory blocks including reading pixels stored in the low-power memory means and pixels stored in the external memory;
wherein the display controller means further comprises:
pixel counter means, having a pixel address that is incremented in response to a pixel clock as pixels are read from the lower-power memory means or from the external memory;
block-end register means for storing a block-end address of a current block in the plurality of physical memory blocks;
block-start register means for storing a block-start address of the current block in the plurality of physical memory blocks;
block-end detect means for detecting a block end when the pixel address from the pixel counter means reaches the block-end address from the block-end register means;
select means for loading the pixel counter means with a next block-start address from the block-start register means when the block-end detect means detects the block end,
line start register means, loaded by the select means with the next block-start address when the block end is detected, for storing a starting pixel address for a display line;
and
add means, receiving the starting pixel address from the line start register means, for adding a line-width of pixels to generate a next-line starting pixel address to be loaded into the line start register means at an end of the display line;
whereby pixels in the single-block frame buffer are stored in multiple physical blocks in both the low-power memory means and in the external memory and whereby the pixel counter means is re-loaded with the next block-start address when the block end is detected.

14 more elements

An integrated circuit capable of being coupled, during use, to an external memory that is separate from the integrated circuit, the integrated circuit comprising:

a memory configured to store a first memory block of a frame buffer that comprises a plurality of memory blocks in a full power mode, wherein at least one of the other memory blocks of the plurality of memory blocks are stored in the external memory in the full power mode;
and
a display controller coupled to the memory and configured to read pixels from the memory to be displayed on a display screen, and wherein, in a low power mode, the display controller is configured to display pixels read from the frame buffer on a reduced window of the display screen that excludes a portion of the display screen, and wherein the display controller is configured to read the displayed pixels for the reduced window only from the first memory block in the memory, and wherein the display controller is configured to display a fixed pixel not read from the memory or the external memory for the remaining pixels on the display screen outside of the reduced window, and wherein, in the full power mode, the display controller is configured to read pixels to be displayed from both the memory and the external memory.

Dependencies are inferred from the claim text.