Word search in content addressable memory

A content addressable memory (CAM) capable of performing wide word searches, comprising:

• a boundary array having a plurality of word boundary bits, each word boundary bit corresponding to a bit pattern entry row of a CAM memory core;
• and
• a serial AND array having a plurality of serial AND computational units, each serial AND computational unit in communication with a corresponding bit pattern entry row of the CAM memory core and a word boundary bit corresponding to the bit pattern entry row, wherein the serial AND computational units receive as inputs a word boundary bit and an internal match line result corresponding to an adjacent bit pattern entry row,
• wherein the serial AND array is capable of utilizing the word boundary bits to compute a match result for wide word entries that span multiple bit pattern entry rows.

A content addressable memory (CAM) capable of performing wide word searches, comprising:

• a boundary array having a plurality of word boundary bits, each word boundary bit corresponding to a bit pattern entry row of a CAM memory core;
• and
• a serial AND array having a plurality of serial AND computational units, each serial AND computational unit in communication with a corresponding bit pattern entry row of the CAM memory core and a word boundary bit corresponding to the bit pattern entry row, wherein the serial AND computational units receive as inputs a control signal indicating a beginning of a search and a control signal indicating an end of a search,
• wherein the serial AND array is capable of utilizing the word boundary bits to compute a match result for wide word entries that span multiple bit pattern entry rows.

A content addressable memory (CAM) capable of performing wide word searches, comprising:

• at least one CAM memory core having a plurality of bit pattern entry rows;
• search logic capable of searching particular rows during each cycle, the search logic further capable of allowing match line results of unsearched rows to remain unchanged during a cycle;
• and
• a serial AND array in communication with the bit pattern entry rows, wherein the serial AND array is capable of computing a match result for wide word entries that span multiple bit pattern entry rows.

A method of performing word searches, the method comprising:

• storing word entries in at least one content addressable memory (CAM) core having a plurality of bit pattern entry rows;
• storing a plurality of word boundary bits in a boundary array, wherein individual ones of the plurality of word boundary bits correspond to individual ones of the plurality of bit pattern entry rows;
• and
• computing a match result for a word entry that spans multiple bit pattern entry rows.

A method, comprising:

• storing word entries in at least one content addressable memory (CAM) core having a plurality of bit pattern entry rows:
• computing a plurality of match line results for selected bit pattern entry rows during a search cycle;
• and
• computing a match result for word entries that span multiple bit pattern entry rows.