High voltage SOI semiconductor device
AssigneePanasonic Corporation
InventorsYasuhiro Uemoto, Katsushige Yamashita, Takashi Miura
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Abstract
In an SOI (Silicon On Insulator) semiconductor device, a first semiconductor layer overlies a semiconductor substrate so as to sandwich an insulating layer, and second and third semiconductor layers with a different conductivity type from the second semiconductor layer are formed on the surface of the first semiconductor layer. At the interface between the first semiconductor layer and the insulating layer, a fourth semiconductor layer with a different conductivity type from the first semiconductor layer is formed. The fourth semiconductor layer includes an impurity of larger than 3×1012/cm2 so as not to be completely depleted even though a reverse bias voltage is applied between the second and third semiconductor layers.
Claims20
An SOI semiconductor device comprising:
- a first semiconductor layer;
- a second semiconductor layer that is formed on a first part of a first main surface of the first semiconductor layer;
- a third semiconductor layer with a conductivity type different from a conductivity type of the second semiconductor layer, the third semiconductor layer being formed on a second part of the first main surface of the first semiconductor layer, the second part being separated from the first part;
- a fourth semiconductor layer with a conductivity type different from a conductivity type of the first semiconductor layer, the fourth semiconductor layer being formed on a second main surface of the first semiconductor layer;
- and
- a first insulating layer that is formed on a main surface of the fourth semiconductor layer opposite to the first semiconductor layer,
- wherein the fourth semiconductor layer includes an impurity of an amount greater than 3×1012/cm2 which is not completely depleted even when a reverse bias voltage is applied between the second and third semiconductor layers, the reverse bias voltage making a potential of a drain lower than a potential of a source a potential of a source lower than a potential of a drain.
An SOI semiconductor device comprising:
- a first semiconductor layer;
- a second semiconductor layer that is formed on a first part of a first main surface of the first semiconductor layer;
- a third semiconductor layer with a conductivity type different from a conductivity type of the second semiconductor layer, the third semiconductor layer being formed on a second part of the first main surface of the first semiconductor layer, the second part being separated from the first part;
- a fourth semiconductor layer with a conductivity type different from a conductivity type of the first semiconductor layer, the fourth semiconductor layer being formed on a second main surface of the first semiconductor layer;
- a first insulating layer that is formed on a main surface of the fourth semiconductor layer opposite to the first semiconductor layer;
- a source electrode, and
- a drain electrode wherein the fourth semiconductor layer includes an impurity of an amount that is large enough so as not to be completely depleted even when a reverse bias voltage is applied between the second and the third semiconductor layers, and the drain electrode is set at a potential lower higher than a potential of a source, the impurity amount is greater than 3×1012/cm2 and equal to or less than 1.0×1017/cm2.
In a system for improving the operating voltage of a semiconductor device having means for applying voltages to the semiconductor device, the improvement of an SOI semiconductor device comprising:
- a first semiconductor layer;
- a second semiconductor layer that is formed on a first part of a first main surface of the first semiconductor layer;
- a third semiconductor layer with a conductivity type different from a conductivity type of the second semiconductor layer, the third semiconductor layer being formed on a second part of the first main surface of the first semiconductor layer, the second part being separated from the first part;
- a fourth semiconductor layer with a conductivity type different from a conductivity type of the first semiconductor layer, the fourth semiconductor layer being formed on a second main surface of the first semiconductor layer;
- and
- a first insulating layer that is formed on a main surface of the fourth semiconductor layer opposite to the first semiconductor layer,
- wherein the fourth semiconductor layer includes an impurity of an amount greater than 3×1012/cm2 which is not completely depleted even when a reverse-bias voltage is applied between the second and third semiconductor layers, the reverse bias voltage making a potential of a drain lower than a potential of a source a potential of a source lower than a potential of a drain.
Dependencies are inferred from the claim text.