Method for making electrical contact with an active area through sub-micron contact openings and a semiconductor device

A semiconductor processing method for making electrical contact with an active area on a semiconductor wafer comprising the steps of:

• providing a pair of conductive runners on a semiconductor wafer, individual conductive runners having a top and sides;
• providing insulative spacers on the sides of the runners, the insulative spacers being spaced a selected distance apart at a selected location on the wafer;
• providing an active area between the conductive runners at the selected location;
• depositing a first oxide layer over the wafer to a thickness from about 100 to 1,000 Angstroms, the first oxide layer having an upper surface defining a highest elevational location above the active area;
• providing a nitride layer having an upper surface over the first oxide layer to a selected thickness, the nitride layer upper surface defining a lowest elevational location above the active area which is elevationally higher than the highest elevational location of the first oxide layer, the nitride being selectively etchable relative to the first oxide;
• planarizing the nitride layer to a first elevational height above the active area, the first elevational height being higher than the highest elevational location of the first oxide layer;
• patterning the planarized nitride layer for definition of a first contact opening therethrough to the active area;
• etching the patterned nitride layer selectively relative to the first oxide layer to define the first contact opening therethrough, the first contact opening having an aperture width at the nitride layer upper surface which is greater than the selected distance between the insulative sides of adjacent conductive runners;
• etching the first oxide layer within the first contact opening to expose the active area;
• providing a polysilicon plug within the first contact opening over the exposed active area to a second elevational height;
• depositing a second oxide layer over the nitride layer and the polysilicon plug;
• patterning and etching the second oxide layer to form a second contact opening to and exposing the polysilicon plug;
• and
• providing a conductive layer over the second oxide layer and into the second contact opening, the conductive layer electrically contacting the conductive plug.

A semiconductor processing method of forming an electrical contact structure for an active area on a semiconductor wafer, the method comprising the following steps:

• providing a pair of conductive runners on a semiconductor wafer, individual conductive runners having sides;
• providing an insulative layer on the mutually adjacent sides of the conductive runners, the insulated mutually adjacent sides of adjacent conductive runners being spaced a selected distance apart;
• providing an active area between the insulated mutually adjacent sides of conductive runners;
• providing a layer of first oxide to a selected thickness over the active area and conductive runners, the first oxide layer selected thickness being less than one-half the selected distance between the insulated sides of adjacent conductive runners;
• providing a first insulating layer having a planarized upper surface atop the first oxide layer, the first layer of insulating material being selectively etchable relative to the first oxide;
• patterning the first insulating layer for definition of a first contact opening therethrough to the active area;
• etching the patterned first insulating layer selectively relative to the first oxide layer to define the first contact opening therethrough, the first contact opening having an aperture width at the first insulating layer planarized upper surface, the aperture width being greater than the selected distance between the insulated sides of adjacent conductive runners;
• etching the first oxide layer within the first contact opening to expose the active area;
• and
• providing a conductive plug of within the first contact opening over the exposed active area.

A semiconductor processing method of forming an electrical contact structure for an active area on a semiconductor wafer, the method comprising the following steps:

• providing a pair of conductive runners on a semiconductor wafer, individual conductive runners having sides;
• providing an insulative layer on the mutually adjacent sides of the conductive runners, the insulated mutually adjacent sides of adjacent conductive runners being spaced a selected distance apart;
• providing an active area between the insulated mutually adjacent sides of conductive runners;
• providing a layer of first oxide to a selected thickness over the active area and conductive runners, the first oxide layer selected thickness being less than one-half the selected distance between the insulated sides of adjacent conductive runners;
• providing a first insulating layer having a planarized upper surface atop the first oxide layer, the first insulating layer being selectively etchable relative to the first oxide, said step performed by,
• providing a conformal first layer of insulating material atop the first oxide layers;
• and
• polishing the wafer to planarize the first insulating layer upper surface;
• patterning the first insulating layer for definition of a first contact opening therethrough to the active area;
• etching the patterned first insulating layer selectively relative to the first oxide layer to define the first contact opening therethrough, the first contact opening having an aperture width at the first insulating layer planarized upper surface, the aperture width being greater than the selected distance between the insulated sides of adjacent conductive runners;
• etching the first oxide layer within the first contact opening to expose the active area;
• and
• providing a conductive plug within the first contact opening over the exposed active area.

A semiconductor processing method for making electrical contact with an active area on a semiconductor wafer comprising the steps of:

• providing a pair of conductive runners on a semiconductor wafer, individual conductive runners having a top and sides;
• providing insulative spacers on mutually adjacent sides of the runners, the insulative spacers being spaced a selected distance apart at a selected location on the wafer;
• providing an active area between the conductive runners at the selected location;
• depositing a first oxide layer over the wafer to a thickness from about 100 to 1,000 Angstroms, the first oxide layer having an upper surface defining a highest elevational location above the active area;
• providing a nitride layer having an upper surface over the first oxide layer to a selected thickness, the nitride layer upper surface defining a lowest elevational location above the active area which is elevationally higher than the highest elevational location of the first oxide layer, the nitride being selectively etchable relative to the first oxide;
• planarizing an upper surface of the nitride layer to a first elevational height above the active area, the first elevational height being higher than the highest elevational location of the first oxide layer upper surface;
• patterning the nitride layer for definition of a first contact opening therethrough to the active area;
• etching the patterned nitride layer selectively relative to the first oxide layer to define the first contact opening therethrough, the first contact opening having an aperture width at the nitride layer upper surface which is greater than the selected distance between the insulative spacers at the mutually adjacent sides of the conductive runners;
• etching the first oxide layer within the first contact opening to expose the active area;
• providing a polysilicon plug within the first contact opening over the exposed active area to a second elevational height;
• and
• depositing a second oxide layer over the nitride layer and the polysilicon plug.

A method of providing electrical communication with a transistor including a source/drain, said method comprising:

• providing a conductor over said source/drain that extends upward and is laterally surrounded by a first layer of insulation;
• providing a second layer of insulation over said first layer of insulation, wherein said second layer of insulation is higher than said conductor and exposes said conductor;
• and
• allowing electrical communication with said source/drain only by way of said conductor.

A method of processing a device comprising a transistor, said method comprising:

• providing a plug in electrical communication with said transistor;
• providing a conductive material in electrical communication with said plug;
• and
• providing an insulating layer lateral to said conductive material, wherein said step of providing an insulating layer occurs before said step of providing a conductive material.