Methods and apparatus for providing direct memory access control
AssigneeAltera Corporation
InventorEdwin Franklin Barry
Life of this patent
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Abstract
Techniques are described for providing mechanisms of data distribution to and collection of data from multiple memories in a data processing system. The system may suitably be a manifold array (ManArray) processing system employing an array of processing elements. Virtual to physical processing element (PE) identifier translation is employed in conjunction with a ManArray PE interconnection topology to support a variety of communication models, such as hyper-cube and such. Also, PE addressing nodes are based upon logically nested parameterized loops. Mechanisms for updating loop parameters, as well as exemplary instruction formats are also described.
Claims18
An apparatus for performing virtual identification (VID) to physical identification (PID) translation for data elements to be accessed within local memory of a processing element (PE) whereby a direct memory access (DMA) controller can access PE local memories according to their VIDs, the apparatus comprising:
- an array of multiple PEs each having local PE memory;
- a DMA controller;
- and
- a memory maintained in the DMA controller for storing a processing element VID-to-PID table mapping processing element VIDs to processing element PIDs utilized by the DMA controller to access local memories according to their VIDs.
A processing apparatus comprising:
- a plurality of processing elements (PEs) communicatively connected by a bus, each PE comprising a register storing anvirtual identification number (V ID) identifying the PE;
- and
- a direct memory access (DMA) controller connected to the bus for accessing local data memory of the PEs, each data access at least partially identified by a V ID;
- wherein during a common data to access multiple PEs, a PE responds to the data access if the V ID stored in the register matches the V ID of the data access.
Dependencies are inferred from the claim text.