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US RE37,059 E1Granted
Wiring pattern of semiconductor integrated circuit device
AssigneeKabushiki Kaisha Toshiba
InventorsMasahiro Abe, Yasukazu Mase, Tomie Yamamoto
Life of this patent
Estimating the term…
Abstract
As shown in FIG. 4, a wiring pattern of a semiconductor integrated circuit device of the present invention comprises a wiring portion extending from a connection hole and a connection portion located on the connection hole and having a matching allowance with respect to said connection hole on said wiring portion side being formed wider than a predetermined matching allowance by a predetermined width with which a required yield of successful matching can be assured.
Claims31
A semiconductor integrated circuit device comprising:
- a semiconductor substrate;
- a square-shaped connection hole formed in said semiconductor substrate;
- a first wiring section formed of a conductive film forming plating sidewalls of said connection hole and having four elements each having a substantially rectangular cross-section adjacent to a respective one of four edges of said connection hole, each of said four elements having a sidewall substantially aligned with a respective plating sidewall of said square-shaped connection hole adjacent to a respective one of the four edges;
- and
- a line-like second wiring section formed of a conductive film having a substantially rectangular cross-section, including a portion connected to a first element of said first wiring section at a juncture at which it has a width narrower than a length of the first element of said first wiring section adjacent to the respective edge of said connection hole,
- wherein said first wiring section forming plating sidewalls of said connection hole is thinner than each of said four elements from the respective one of the four edges to a major surface of the conductive film parallel to the substrate, and a first width, defined by a width of the first element at the major surface from the respective edge of said connection hole, is greater than second to fourth widths, respectively defined by corresponding widths of the second element, the third element, and the fourth element from the respective edges of said connection hole.
3 more elements
A semiconductor integrated circuit device, comprising:
- a first wiring portion formed in and around a connection hole, the connection hole having edges and a center;
- a second wiring portion having an end portion connected to the first wiring portion, the width of the end portion being less than twice the minimum center-to-edge distance of the connection hole, the second wiring portion, the first wiring portion, and the connection hole defining first, second, and third distances;
- the first distance being the minimum distance from the end portion of the second wiring portion to an edge of the connection hole, the edge of the connection hole closest to the end portion of the second wiring portion being a first edge;
- the second distance being the minimum distance from a second edge of the connection hole opposite to the first edge to an edge of the first wiring portion;
- and
- the third distance being the minimum distance from a third edge of the connection hole other than the first edge and the second edge to an edge of the first wiring portion;
- wherein the first distance is greater than the second distance, the first distance is greater than the third distance, and the second distance is substantially equal to the third distance.
4 more elements
A semiconductor integrated circuit device, comprising:
- a first wiring portion formed in and around a connection hole, the connection hole having edges and a center;
- a second wiring portion having an end portion connected to the first wiring portion at a first edge of the first wiring portion, the width of the end portion being less than twice the minimum center-to-edge distance of the connection hole;
- and
- a third wiring portion defined by the first wiring portion, the second wiring portion, and a straight line from one end of the first edge of the first wiring portion to the second wiring portion, an angle θ being between the straight line and the first edge of the first wiring portion, wherein (0<θ<π/2).
1 more element
A semiconductor integrated circuit device comprising:
- a first wiring portion in and around a connection hole, the connection hole having edges and a center;
- a second wiring portion having an end portion connected to the first wiring portion at a first edge of the first wiring portion;
- a third wiring portion defined by the first wiring portion, the second wiring portion, and a first straight line from one end of the first edge of the first wiring portion to the second wiring portion, with an angle θ being between the first straight line and the first edge of the first wiring portion, wherein (0<θ<π/2);
- and
- a fourth wiring portion defined by the first wiring portion, the second wiring portion, and a second straight line from the other end of the first edge of the first wiring portion to the second wiring portion, with an angle θ being between the second straight line and the first edge of the first wiring portion, wherein (0<θ<π/2).
2 more elements
Dependencies are inferred from the claim text.