Schottky enhanced CMOS output circuit
AssigneeLinear Technology Corporation
InventorRobert L. Reay
Life of this patent
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Abstract
The high impedance state of a tri-state CMOS transistor output circuit is enhanced by serially connecting first and second Schottky diodes with the P-channel transistor and the N-channel transistor whereby in the high impedance state reverse bias of the substrate/source-drain diodes of the two transistors is prevented when the output of the circuit is taken beyond the supply voltage potentials of the output circuit.
Claims14
A CMOS output circuit comprising:
- first and second voltage potentials;
- a P-channel transistor having source, drain, and gate electrodes and an N-channel transistor having source, drain, and gate electrodes;
- first input terminal means for applying a first input signal to said gate of said P-channel transistor;
- second input terminal means for applying a second input signal to said gate electrode of said N-channel transistor;
- a first Schottky diode connecting said source electrode of said P-channel transistor to said first voltage potential;
- means connecting said source electrode of said N-channel transistor to said second voltage potential;
- an output terminal connected to said drain electrode of said P-channel transistor;
- and
- a second Schottky diode connecting said output terminal to said drain electrode of said N-channel transistor.
A CMOS output circuit comprising:
- first and second voltage potentials;
- a P-channel transistor;
- an N-channel transistor;
- first input terminal means for applying a first input signal to a gate electrode of said P-channel transistor;
- second input terminal means for applying a second input signal to a gate electrode of said N-channel transistor;
- a first Schottky diode serially connected with said P-channel transistor between said first voltage potential and an output terminal;
- and
- a second Schottky diode serially connected with said N-channel transistor between said output terminal and said second voltage potential.
In an output circuit having an output terminal and first and second transistors which respectively couple first and second voltage potentials to said output terminal responsive to input signals applied to control electrodes of said first and second transistors, wherein at least one of said first and second transistors is an MOS transistor, an improvement comprising:
- a Schottky diode in series with said MOS transistor between said output terminal and one of said first and second voltage potentials.
Dependencies are inferred from the claim text.