Method of making mosfet by multiple implantations followed by a diffusion step
AssigneeSGS-Thomson Microelectronics S.A.
InventorsYu-Pin Han, Tsiu C. Chan
Life of this patent
Estimating the term…
Abstract
A short channel metal oxide semiconductor transistor device is processed without undesirable short channel effects, such as V.sub.T falloff and with a reasonable source-drain operating voltage support. In a substrate lightly doped with P-type conductivity material and source and drain region heavily doped with an N-type conductivity material, two lightly doped N- regions are disposed between the edge of the gate and the source and drain regions. A channel region is more heavily doped with P-type material than the substrate. Two regions extend from opposite sides of the channel region to an area generally below the two N- regions and above the substrate, which regions are more heavily doped than the channel regions.
Claims7
A method for manufacturing a metal oxide semiconductor transistor device comprising:
- providing a semiconductor substrate of a first conductivity type;
- forming a first insulating layer of silicon dioxide on an active surface of the substrate;
- implanting ions of a first conductivity type into said substrate;
- depositing a layer of polysilicon on said first insulating layer;
- implanting ions of a second conductivity type through said polysilicon layer;
- growing a second region of silicon dioxide, said silicon dioxide region being grown over said polysilicon layer;
- placing a photoresistive mask over said second oxidation layer for forming a gate of the semiconductor device;
- etching a predetermined portion of said second oxidation layer;
- plasma etching said polysilicon layer;
- removing a predetermined portion of said polysilicon layer underneath said second silicon dioxide layer;
- [etching said second layer of silicon dioxide;]
- stripping said photoresist area from said second oxidation layer;
- implanting ions of the second conductivity type;
- [implanting ions of the first conductivity type;]
- etching said second layer of silicon dioxide overhanging said polysilicon gate layer;
- [etching said first layer of silicon dioxide surrounding said polysilicon gate layer;]
- implanting ions of said first conductivity type;
- implanting ions of said second conductivity type;
- diffusing the implanted ions into said substrate;
- and
- oxidizing the active surface of said substrate, including said polysilicon gate.
A method for forming an MOS transistor comprising the steps of
- providing a silicon wafer of p-type,
- forming a gate oxide layer over the top surface of the wafer,
- implanting acceptor ions non-selectively into the top surface of the wafer,
- depositing a polysilicon layer over the gate oxide layer,
- oxidizing the top surface of the polysilicon layer to form a polyoxide layer,
- depositing a layer of photoresist over the polysilicon layer and patterning the photoresist to leave a selected portion overlying the polyoxide layer,
- using a selected portion of the photoresist while etching the polyoxide layer and the polysilicon layer and undercutting the polyoxide layer a prescribed amount,
- implanting donor ions selectively into the wafer using the polyoxide layer and the polysilicon layer as a mask,
- removing the polyoxide layer from the top surface of the polysilicon layer,
- implanting donor and acceptor ions selectively into the wafer using the polysilicon layer as a mask, and
- heating the wafer for diffusing the implanted acceptor ions deeper into the wafer than the implanted donor ions.
A method for manufacturing a metal oxide semiconductor transistor device characterized in that it comprises the following steps:
- providing a semiconductor substrate (12) of a first conductivity type,
- forming a first insulating layer (40) of silicon dioxide on an active surface of the substrate,
- implanting (42) ions of a first conductivity type into said substrate,
- depositing a layer (14) of polysilicon on said first insulating layer,
- implanting ions of a second conductivity type in said polysilicon layer,
- growing a second region (46) of silicon dioxide, said silicon dioxide region being grown over said polysilicon layer,
- placing a photoresistive mask (44) over said second silicon dioxide region
- etching a predetermined portion of said second dioxide region and plasma etching said polysilicon layer;
- to leave a double layer of silicon dioxide and polysilicon longer than desire for the gate,
- removing a predetermined portion of said polysilicon layer underneath said second silicon dioxide layer to realize the polysilicon gate (14)
- stripping the photoresist mask from said second silicon dioxide layer leaving a portion of the second layer of silicon dioxide overhanging said polysilicon gate
- implanting (50) ions of the second conductivity type by using said second layer of silicon dioxide as a mask for forming heavily doped regions
- etching said second layer (46) of silicon dioxide overhanging said polysilicon gate layer
- implanting (52) ions of said second conductivity type for forming lightly doped regions between the gate region and the heavily doped regions
- implanting (54) ions of said first conductivity type for forming doped regions under the edges of the gate
- diffusing the implanted ions into said substrate, and oxidizing the active surface of said substrate, including said polysilicon gate.
Dependencies are inferred from the claim text.