Memory module with dynamic stripe width
AssigneeRambus Inc.
InventorsFrederick A. Ware, John Eric Linstadt, Kenneth L. Wright
Life of this patent
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Abstract
In a memory module having a buffer component, a plurality of data signaling paths and a plurality of memory dies each coupled to a respective one of the data signaling paths, the buffer component receives and stores a first configuration value that specifies a memory-die quantity N, where N is permitted to range from a first value corresponding to the quantity of the data signaling paths to at least one value less than the first value. The buffer component further receives a memory read command and enables, in accordance with the first configuration value, a quantity N of the memory dies to output read data in response to the memory read command.
Claims16
A method of operation within a dynamic random access memory (DRAM) module having a substrate, a plurality of DRAM dies and a plurality of data signaling paths, each of the data signaling paths disposed on the substrate and extending from a respective one of the DRAM dies to a respective interconnect location at an edge of the substrate to be connected to a remote memory controller via a respective set of one or more external signaling links that extend beyond the DRAM module to the remote memory controller, the method comprising:
- receiving and storing a first configuration value that specifies a DRAM-die quantity N that is permitted to range from a first value corresponding to the quantity of the data signaling paths to at least one value less than the first value;
- receiving a memory read command;
- and
- enabling, in accordance with the first configuration value, a quantity N of the DRAM dies to output read data via respective ones of the data signaling paths in response to the memory read command.
A dynamic random access memory (DRAM) module comprising:
- a substrate;
- a plurality of DRAM dies;
- a plurality of data signaling paths each disposed on the substrate and extending from a respective one of the DRAM dies to a respective interconnect location at an edge of the substrate to be connected to a remote memory controller via a respective set of one or more external signaling links that extend beyond the DRAM module to the remote memory controller;
- and
- a buffer component to:
- receive and store a first configuration value that specifies a DRAM-die quantity N that is permitted to range from a first value corresponding to the quantity of the data signaling paths to at least one value less than the first value;
- receive a memory read command;
- and
- enable, in accordance with the first configuration value, a quantity N of the DRAM dies to output read data via respective ones of the data signaling paths in response to the memory read command.
Dependencies are inferred from the claim text.