Decoder, receiver, and electronic device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsTakeshi Aoki, Munehiro Kozuma, Yoshiyuki Kurokawa
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AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsTakeshi Aoki, Munehiro Kozuma, Yoshiyuki Kurokawa
Estimating the term…
A decoder with reduced power consumption is provided. The decoder includes a first circuit and a second circuit for holding data. The second circuit includes a first transistor, a second transistor, and a third transistor. The first transistor and the second transistor include an oxide semiconductor in a channel formation region. The third transistor includes silicon in a channel formation region. A gate of the second transistor is electrically connected to one of a source and a drain of the first transistor and a gate of the third transistor is electrically connected to one of a source and a drain of the second transistor. The decoder is configured to provide or stop power supply to the semiconductor device depending on a packet ID of a header portion of the data and to perform data storing or restoring of data between the first circuit and the second circuit.
A decoder configured to decode data, the decoder comprising:
A decoder configured to decode data, the decoder comprising:
A decoder configured to decode data, the decoder comprising:
Dependencies are inferred from the claim text.