Optimizing physical parameters in fault-tolerant quantum computing to reduce frequency crowding
AssigneeInternational Business Machines Corporation
InventorsJay M. Gambetta, Easwar Magesan
Life of this patent
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Abstract
A technique relates to quantum error correction. Code qubits are configured as target qubits, and the code qubits have a first dephasing time and a first anharmonicity. Syndrome qubits are configured as control qubits, and the syndrome qubits have a second dephasing time and a second anharmonicity. The target qubits and the control qubits are configured to form one or more controlled not (CNOT) gates. The first dephasing time is greater than the second dephasing time and the second anharmonicity is greater than the first anharmonicity.
Claims18
A circuit for quantum error correction, the circuit comprising:
- code qubits configured as target qubits, the code qubits having a first dephasing time and a first anharmonicity;
- and
- syndrome qubits configured as control qubits, the syndrome qubits having a second dephasing time and a second anharmonicity, wherein the target qubits and the control qubits being configured to form one or more controlled not (CNOT) gates, wherein the first dephasing time is greater than the second dephasing time and the second anharmonicity is greater than the first anharmonicity.
A method of configuring a circuit for quantum error correction, the method comprising:
- configuring code qubits as target qubits, the code qubits having a first dephasing time and a first anharmonicity;
- and
- configuring syndrome qubits as control qubits, the syndrome qubits having a second dephasing time and a second anharmonicity, wherein the target qubits and the control qubits are configured to form one or more controlled not (CNOT) gates, wherein the first dephasing time is greater than the second dephasing time and the second anharmonicity is greater than the first anharmonicity.
Dependencies are inferred from the claim text.