Integrated circuit package substrate with microstrip architecture and electrically grounded surface conductive layer

An integrated circuit package comprising:

• a package substrate, the package substrate comprising:
• an internal ground layer,
• a dielectric layer on the internal ground layer,
• a microstrip signal layer on the dielectric layer, wherein the microstrip signal layer is the top transmission line layer;
• a solder resist layer on the microstrip signal layer, wherein the solder resist layer includes a die attaching area and a non-die attaching area, and
• a surface conductive layer on the solder resist layer in the non-die attaching area, wherein the surface conductive layer is electrically connected to the internal ground layer;
• a die, wherein the die is attached to the package substrate in the die attaching area;
• and
• first level interconnects, wherein the die is electrically coupled to the package substrate via the first level interconnects,
• wherein the surface conductive layer at least partially covers non-die attaching area on the solder resist layer.

A method for fabricating an integrated circuit package substrate, the method comprising:

• forming an internal ground layer on a substrate on a substrate;
• forming a dielectric layer on the internal ground layer;
• forming a microstrip signal layer on the dielectric layer;
• forming a solder resist layer on the microstrip signal layer, wherein the solder resist layer includes a die attaching area and a non-die attaching area;
• forming a surface conductive layer on the solder resist layer in the non-die attaching area;
• and
• forming an electrical connection between the surface conductive layer and the internal ground layer,
• wherein the surface conductive layer at least partially covers the non-die attaching area on the solder resist layer.