Pulse to digital converter
AssigneeQUALCOMM Incorporated
InventorsEskinder Hailu, Bupesh Pandita
Life of this patent
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Abstract
Aspects of the disclosure are directed to a pulse to digital converter. In accordance with one aspect, the pulse to digital converter includes an input to receive an input pulse signal; a fractional element, coupled to the input, wherein the fractional element generates a fractional pulse width measurement of the input pulse signal; and an integral element, coupled to the input, wherein the integral element generates an integral pulse width measurement of the input pulse signal, and wherein the fractional pulse width measurement and the integral pulse width measurement are concatenated as an output signal.
Claims30
A pulse to digital converter (PDC), comprising:
- an input to receive an input pulse signal;
- a fractional element, coupled to the input, wherein the fractional element generates a fractional pulse width measurement of the input pulse signal using one or more interpolated states;
- and
- an integral element, coupled to the input, wherein the integral element generates an integral pulse width measurement of the input pulse signal, and wherein the fractional pulse width measurement and the integral pulse width measurement are concatenated as an output signal.
A pulse to digital converter (PDC) comprising:
- an input to receive an input pulse signal;
- a fractional element, coupled to the input, wherein the fractional element generates a fractional pulse width measurement of the input pulse signal, and wherein the fractional element comprises a gated ring oscillator, a binary converter and at least two flip flops;
- and
- an integral element, coupled to the input, wherein the integral element generates an integral pulse width measurement of the input pulse signal, and wherein the fractional pulse width measurement and the integral pulse width measurement are concatenated as an output signal.
A pulse to digital converter (PDC), comprising:
- an input to receive an input pulse signal;
- a fractional element, coupled to the input, the fractional element comprising a gated ring oscillator coupled in series to a first flip flop, and a binary converter coupled to the first flip flop and a second flip flop to generate a fractional pulse width measurement of the input pulse signal;
- and
- an integral element, coupled to the input, the integral element comprising a most significant bit (MSB) counter coupled to a third flip flop, and a multiplexer coupled to the third flip flop and a fourth flip flop to generate an integral pulse width measurement of the input pulse signal.
A pulse to digital converter (PDC) comprising:
- means for receiving an input pulse signal;
- means for generating a fractional pulse width measurement of the input pulse signal using one or more interpolated states;
- means for generating an integral pulse width measurement of the input pulse signal;
- and
- means for concatenating the fractional pulse width measurement and the integral pulse width measurement as an output signal.
A pulse to digital converter (PDC) comprising
- means for receiving an input pulse signal;
- means for generating a fractional pulse width measurement of the input pulse signal;
- means for generating an integral pulse width measurement of the input pulse signal;
- means for concatenating the fractional pulse width measurement and the integral pulse width measurement as an output signal;
- and
- means for synchronizing the input pulse signal with a timing of the means for generating the fractional pulse width measurement.
A method for pulse width measurement, the method comprising:
- providing an input pulse signal;
- generating a fractional pulse width measurement of the input pulse signal using one or more interpolated states;
- generating an integral pulse width measurement of the input pulse signal;
- and
- concatenating the fractional pulse width measurement and the integral pulse width measurement to generate an output signal.
A method for pulse width measurement, the method comprising:
- providing an input pulse signal;
- generating a fractional pulse width measurement of the input pulse signal, wherein the generating the fractional pulse width measurement is implemented by a gated ring oscillator coupled in series to a first flip flop, and a binary converter coupled to the first flip flop and a second flip flop;
- generating an integral pulse width measurement of the input pulse signal;
- and
- concatenating the fractional pulse width measurement and the integral pulse width measurement to generate an output signal.
Dependencies are inferred from the claim text.