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US 9,961,440 B2Granted
Systems and methods for using electrostatic microphone
AssigneeWizedsp Ltd.
InventorsOz Gabai, Haim Primo
Life of this patent
Estimating the term…
Abstract
A method and a system for ultra-low-power acoustic sensor including a buffer transistor, which gate terminal is connected to a first terminal of a capacitive acoustic sensor, which drain terminal is connected via a load network to a power source and to an output terminal, and which source terminal is connected to the regulated current source, where the regulated current source is connected between the source terminal of the buffer transistor and a reference terminal, and where the reference terminal being connectable to a second terminal of the capacitive acoustic sensor.
Claims32
A device comprising:
- a buffer transistor, which gate terminal is connected to a first terminal of a capacitive acoustic sensor, which drain terminal is connected via a load network to a power source and to an output terminal, and which source terminal is connected to at least one of:
- a regulated current source;
- wherein said regulated current source is connected between said source terminal of said buffer transistor and a reference terminal;
- and
- wherein said reference terminal being connectable to a second terminal of said capacitive acoustic sensor;
- and
- via a resistor to a reference terminal, and a regulated voltage source is connected between a second terminal of said acoustic sensor and said reference terminal, wherein said regulated voltage source provides at least one of:
- a negative voltage at said gate terminal of said buffer transistor relative to said source terminal of said buffer transistor if said buffer transistor has an N-channel;
- and
- a positive voltage at said gate terminal of said buffer transistor relative to said source terminal of said buffer transistor if said buffer transistor has an P-channel, and
- wherein said buffer transistor has a relatively high drain current at zero bias (Idss).
8 more elements
A device comprising:
- a buffer transistor, which gate terminal is connected to a first terminal of a capacitive acoustic sensor, which drain terminal is connected via a load network to a power source and to an output terminal, and which source terminal is connected to at least one of:
- a regulated current source;
- wherein said regulated current source is connected between said source terminal of said buffer transistor and a reference terminal;
- and
- wherein said reference terminal being connectable to a second terminal of said capacitive acoustic sensor;
- and
- via a resistor to a reference terminal, and a regulated voltage source is connected between a second terminal of said acoustic sensor and said reference terminal;
- and
- a sample-and-hold circuit,
- wherein said sample-and-hold circuit is additionally operative to control supply of operating voltage to at least one of said buffer transistor, said current source and said power source, and
- wherein operation of said sample-and-hold circuit is synchronized with operation of said supply of operating voltage to at least one of said buffer transistor, said current source and said power source.
8 more elements
A method comprising:
- connecting a gate terminal of a buffer transistor to a first terminal of a capacitive acoustic sensor;
- connecting a drain terminal of said buffer transistor via a load network to a power source and to an output terminal;
- and
- connecting a source terminal of said buffer transistor to at least one of:
- a regulated current source connected between said source terminal of said buffer transistor and a reference terminal;
- and
- to a reference terminal via a resistor, and connecting a regulated voltage source between a second terminal of said capacitive acoustic sensor and said reference terminal, wherein said regulated voltage source provides at least one of:
- a negative voltage at said gate terminal of said buffer transistor relative to said source terminal of said buffer transistor if said buffer transistor has an N-channel;
- and
- a positive voltage at said gate terminal of said buffer transistor relative to said source terminal of said buffer transistor if said buffer transistor has an P-channel,
- wherein said reference terminal is connectable to a second terminal of said capacitive acoustic sensor, and
- wherein said buffer transistor has a relatively high drain current at zero bias (Idss).
9 more elements
The method according to 7 wherein said buffer transistor is at least one of:
- a field effect transistor (FET), a jFET and a MOSFET.
A method comprising:
- connecting a gate terminal of a buffer transistor to a first terminal of a capacitive acoustic sensor;
- connecting a drain terminal of said buffer transistor via a load network to a power source and to an output terminal;
- and
- connecting a source terminal of said buffer transistor to at least one of:
- a regulated current source connected between said source terminal of said buffer transistor and a reference terminal;
- and
- to a reference terminal via a resistor, and connecting a regulated voltage source between a second terminal of said capacitive acoustic sensor and said reference terminal;
- wherein said reference terminal being connectable to a second terminal of said capacitive acoustic sensor;
- and
- connecting a sample-and-hold circuit to said drain terminal of said buffer transistor;
- wherein said sample-and-hold circuit is additionally operative to control supply of operating voltage to at least one of said buffer transistor, said current source and said power source, and
- wherein operation of said sample-and-hold circuit is synchronized with operation of said supply of operating voltage to at least one of said buffer transistor, said current source and said power source.
9 more elements
Dependencies are inferred from the claim text.