Modeling of a physical system using two-dimensional look-up table and linear interpolation

A method for digital pre-distortion implemented using one or more hardware processors and a memory, the method comprising:

• determining, using the one or more processors, a non-linear function that estimates actual output values of a power amplifier in response to respective complex input values;
• using an optimization method including a least squares algorithm, recursive least squares (RLS) or least mean square (LMS) to determine coefficients of a piece-wise polynomial function that estimates the determined non-linear function, the coefficients substantially minimizing a mean square error of a difference between the non-linear function and the piece-wise polynomial function;
• generating a plurality of two-dimensional look-up tables with bilinear interpolation, using the one or more hardware processors, by storing the coefficients as entries in the plurality of two-dimensional look up tables in the memory;
• receiving, by the one or more processors, a complex value input corresponding to an actual input value;
• identifying, using the one or more hardware processors, two closest entries, a first closest entry and a second closest entry, to the complex input value in a two-dimensional look-up table of the one or more two-dimensional look-up tables;
• wherein each of the plurality of two-dimensional look-up tables with bilinear interpolation are characterized as {circumflex over (f)}(x)=Σp=0P−1Σq=0P−1φp,qΛ(x−(p+jq)δ−γ, where x is the complex input value, Λ is a triangular basis function, φ is the coefficient and γ is a constant offset, P is complex point, p, q and δ are integer numbers;
• evaluating, using the one or more hardware processors, the piece-wise polynomial function at the complex input value twice, a first evaluation using the coefficients corresponding to the first closest entry and a second evaluation using the coefficients corresponding to the second closest entry, to generate first and second output values;
• generating, using the one or more hardware processors, an output value by performing a linear interpolation between the first and second output values;
• and
• determining an output of the power amplifier based on the generated output value.