Integrated circuit and semiconductor device including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsDal-Hee Lee, Jae-Woo Seo, Min-Ho Park
Life of this patent
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Abstract
An integrated circuit (IC) includes at least one unit cell. The at least one unit cell includes a first bit circuit configured to process a first bit signal, a second bit circuit configured to process a second bit signal, a first well spaced apart from boundaries of the at least one unit cell and biased to a first voltage, and a second well biased to a second voltage that is different from the first voltage. Each of the first and second bit circuits includes at least one transistor from among a plurality of transistors disposed in the first well.
Claims20
An integrated circuit (IC) comprising at least one unit cell, wherein the at least one unit cell comprises:
- a first bit circuit configured to process a first bit signal;
- a second bit circuit configured to process a second bit signal;
- a well spaced apart from boundaries of the at least one unit cell,
- wherein the first bit circuit and the second bit circuit share the well, the well comprises a plurality of transistors, the first bit circuit comprises a first transistor from among the plurality of transistors disposed in the well, and the second bit circuit comprises a second transistor from among the plurality of transistors disposed in the well;
- and
- a common circuit configured to receive a control signal and control the first and second bit circuits according to the control signal.
An integrated circuit (IC) comprising at least one unit cell, wherein the at least one unit cell comprises:
- a first bit circuit configured to process a first bit signal;
- a second bit circuit configured to process a second bit signal;
- a first well spaced apart from boundaries of the at least one unit cell and biased to a first voltage;
- a second well biased to a second voltage that is different from the first voltage;
- a third well biased to the second voltage;
- and
- a common circuit configured to receive a control signal and control the first and second bit circuits according to the control signal,
- wherein each of the first and second bit circuits comprises at least one transistor from among a plurality of transistors disposed in the first well,
- wherein the second and third wells each contact one side from a pair of sides of the at least one unit cell that face each other, and the pair of sides corresponds to the boundaries of the at least one unit cell,
- wherein the common circuit is disposed at the one side from the pair of sides contacted by the second well, and a portion of the second well is disposed in a same area as the common circuit.
Dependencies are inferred from the claim text.