N-bit compare logic with single ended inputs

A method of comparing, the method comprising:

• receiving a first single-ended input comprising n-bits, wherein n is a positive integer;
• receiving a second single-ended input comprising n-bits;
• performing a bitwise product of NAND functions of n-bits of the first single-ended input with corresponding n-bits of the second single-ended input to generate a partial match output based only on the first single-ended input and the second single-ended input;
• performing a bitwise summation of NOR functions of n-bits of the first single-ended input with corresponding n-bits of the second single-ended input to generate a partial mismatch output based only on the first single-ended input and the second single-ended input;
• and
• performing an AND function of the partial match output and the partial mismatch output to generate a comparison output based on the partial match output and the partial mismatch output.

An apparatus comprising:

• a first single-ended input comprising n-bits, wherein n is a positive integer;
• a second single-ended input comprising n-bits;
• means for performing a bitwise product of NAND functions of n-bits of the first single-ended input with corresponding n-bits of the second single-ended input to generate a partial match output based only on the first single-ended input and the second single-ended input;
• means for performing a bitwise summation of NOR functions of n-bits of the first single-ended input with corresponding n-bits of the second single-ended input to generate a partial mismatch output based only on the first single-ended input and the second single-ended input;
• and
• means for performing an AND function of the partial match output and the partial mismatch output to generate a comparison output based on the partial match output and the partial mismatch output.