Semiconductor device

A semiconductor device provided with an active element part and a gate pad part defined on a semiconductor substrate which is formed by laminating a low resistance semiconductor layer of a first conductive type or a second conductive type and a drift layer of the first conductive type to each other, wherein

• the active element part includes:
• the low resistance semiconductor layer;
• the drift layer formed on the low resistance semiconductor layer;
• a base region of the second conductive type formed on a surface of the drift layer;
• a high concentration impurity diffusion region of the first conductive type formed on a surface of the base region;
• a gate electrode layer formed on the base region sandwiched between the high concentration impurity diffusion region and the drift layer with a gate insulation layer interposed therebetween;
• and
• a first electrode layer formed in contact with the high concentration impurity diffusion region and the base region in a state where the first electrode layer is insulated from the gate electrode layer with an interlayer insulation layer interposed therebetween, and
• the gate pad part includes:
• the low resistance semiconductor layer;
• the drift layer formed on the low resistance semiconductor layer;
• a conductor layer formed above the drift layer over the whole area of the gate pad part with a field insulation layer having a thickness of 200 nm to 500 nm interposed therebetween;
• and
• a gate oscillation suppressing structure where a first region having a diffused impurity of the second conductive type and which is electrically connected to the first electrode layer on the surface of the drift layer, and a second region having a non diffused impurity of the second conductive type formed on the surface of the drift layer,
• wherein
• the base region has a first surface in contact with the first electrode layer, the high concentration diffusion region has a second surface in contact with the first electrode layer, and the first surface, the second surface, are coplanar with the surface of the drift layer,
• a plurality of first regions and a plurality of second regions are alternately formed, completely separated from each other, on the surface of the drift layer so as to be in direct contact with the field insulation layer, and
• the second region of the plurality of second regions is on the drift layer of the first conductive type or a reference concentration semiconductor layer of the first conductive type so as to increase gate drain capacitance of the semiconductor device.