Semiconductor structure with insertion layer and method for manufacturing the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsCheng-Wei Lian, Chih-Lin Wang, Kang-Min Kuo, Chih-Wei Lin
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsCheng-Wei Lian, Chih-Lin Wang, Kang-Min Kuo, Chih-Wei Lin
Estimating the term…
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate, an interfacial layer formed over the substrate, and an insertion layer formed over the interfacial layer. The semiconductor structure further includes a gate dielectric layer formed over the insertion layer and a gate structure formed over the gate dielectric layer. The insertion layer and the gate dielectric layer may be metal oxides where the insertion layer has an oxygen coordination number greater than the gate dielectric layer.
A semiconductor structure, comprising:
A semiconductor structure, comprising:
A method for manufacturing a semiconductor structure, comprising:
Dependencies are inferred from the claim text.
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Characterised by the insulator, e.g. by the gate insulator: comprising metallic compounds, e.g. metal oxides or metal silicates
The insulator being formed after the semiconductor body, the semiconductor being silicon: making the insulator
On single crystalline silicon, e.g. chemical oxidation using a liquid: by deposition, e.g. evaporation, ALD or laser deposition
Manufacture or treatment: using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e.…
About 9 years of term left · ends 20 Oct 2035 (estimated)
Semiconductor devices are used in a variety of electronic applications, such as personal computers, cell phones, digital cameras, and other electronic equipment. Semiconductor devices are typically fabricated by sequentially depositing insulating or dielectric layers, conductive layers, and semiconductor layers of material over a semiconductor substrate, and patterning the various material layers using lithography to form circuit components and elements thereon.
However, although existing semiconductor manufacturing processes have generally been adequate for their intended purposes, as device scaling-down continues, they have not been entirely satisfactory in all respects.
Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It should be noted that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.
FIGS. 1A to 1D are cross-sectional representations of various stages of forming a semiconductor structure in accordance with some embodiments.
FIGS. 2A to 2B are cross-sectional representations of various stages of forming a semiconductor structure in accordance with some embodiments.
The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.
Furthermore, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.
Embodiments of semiconductor structures and methods for manufacturing the same are provided. The semiconductor structure includes an insertion layer formed between an interfacial layer and a gate dielectric layer. The insertion layer is made of metal oxide, and the oxygen in the insertion layer can complement the oxygen vacancy in the gate dielectric layer.