Semiconductor device for manufacturing
AssigneeSamsung Electronics Co., Ltd.
InventorsSangjine Park, Kee Sang Kwon, Jae-Jik Baek, Boun Yoon
Life of this patent
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Abstract
A semiconductor device includes an active pattern protruding from a substrate, gate structures crossing over the active pattern, gate spacers on sidewalls of the gate structures, a source/drain region in the active pattern between the gate structures, and a source/drain contact on and connected to the source/drain region. The source/drain contact includes a first portion between the gate structures and being in contact with the gate spacers, a second portion on the first portion and not being in contact with the gate spacers, and a third portion on the second portion. A first boundary between the second and third portions is at the substantially same height as a top surface of the gate structure.
Claims20
A semiconductor device comprising:
- an active pattern;
- a gate structure crossing over the active pattern;
- a gate spacer on a sidewall of the gate structure;
- a source/drain region on the active pattern at a side of the gate structure;
- a source/drain contact on the source/drain region and connected to the source/drain region;
- and
- a gas-permeable layer between the gate spacer and the source/drain contact,
- wherein the source/drain contact comprises:
- a first portion at a side of the gate structure, the first portion being in contact with the gate spacer;
- a second portion on the first portion, the second portion being spaced apart from the gate spacer;
- and
- a third portion on the second portion,
- wherein a first boundary between the second and third portions is at substantially a same height as a top surface of the gate structure;
- and
- wherein the gas-permeable layer extends to contact the source/drain region.
A semiconductor device comprising:
- active patterns protruding from a substrate, the active patterns extending in a first direction, and the active patterns arranged along a second direction intersecting the first direction;
- gate structures extending in the second direction and crossing over the active patterns;
- gate spacers on sidewalls of the gate structures;
- a plurality of source/drain regions respectively on the active patterns between the gate structures;
- a source/drain contact connected to at least one source/drain region of the plurality of source/drain regions;
- and
- a gas-permeable layer between the source/drain contact and one of the gate spacers,
- wherein the source/drain contact comprises:
- a first portion being in contact with the at least one source/drain region;
- a second portion extending from the first portion, the second portion at a lower level than top surfaces of the gate structures;
- and
- a third portion extending from the second portion, the third portion at a higher level than the top surfaces of the gate structures,
- wherein a first width of the first portion is greater than a second width of the second portion when viewed from a cross-sectional view taken along the first direction;
- and
- wherein the gas-permeable layer is in contact with the source/drain region.
A semiconductor device comprising:
- an active fin on a substrate;
- a gate structure crossing over the active fin;
- a source/drain region on the substrate adjacent the gate structure;
- a source/drain contact on the source/drain region and connected to the source/drain region, wherein the source/drain contact comprises a first portion in contact with the source/drain region and a second portion on the first portion;
- and
- a gas-permeable capping layer on an upper surface of the first portion of the source/drain contact, wherein the second portion of the source/drain contact extends through the gas-permeable capping layer to contact the first portion of the source/drain contact,
- wherein the gas-permeable capping layer extends to contact a sidewall of the first portion and the source/drain region.
Dependencies are inferred from the claim text.