Thin film transistor and manufacturing method thereof, array substrate and display device

An array substrate, comprising a thin film transistor, wherein the thin film transistor comprises:

• a gate electrode, a gate insulating layer, a metal oxide semiconductor (MOS) active layer, a source electrode and a drain electrode provided on a substrate, the MOS active layer being located between the substrate and the source electrode and the drain electrode, and corresponding to a gap between the source electrode and the drain electrode;
• and
• a first pattern and a second pattern contacting the MOS active layer and located at a same layer with the MOS active layer,
• wherein the first pattern corresponds to the source electrode and directly contacts the source electrode, and the second pattern corresponds to the drain electrode and directly contacts the drain electrode,
• wherein the first pattern and the second pattern comprise indium oxide series binary metal oxide configured to be conductive material, and the MOS active layer comprises indium oxide series multiple MOS, and
• wherein the indium oxide series binary metal oxide comprises indium tin oxide (ITO), indium gallium oxide (IGO), or indium zinc oxide (IZO), and wherein the indium oxide series multiple MOS comprises metal doping ions comprising at least one kind of zinc ions (Zn2+), gallium ions (Ga3+), tin ions (Sn2+), aluminium ions (Al3+) and hafnium ions (Hf4+).

A display device, comprising an array substrate, wherein the array substrate comprises a thin film transistor, the thin film transistor comprising:

• a gate electrode, a gate insulating layer, a metal oxide semiconductor (MOS) active layer, a source electrode and a drain electrode provided on a substrate, the MOS active layer being located between the substrate and the source electrode and the drain electrode, and corresponding to a gap between the source electrode and the drain electrode;
• and
• a first pattern and a second pattern contacting the MOS active layer and located at a same layer with the MOS active layer,
• wherein the first pattern corresponds to the source electrode and directly contacts the source electrode, and the second pattern corresponds to the drain electrode and directly contacts the drain electrode,
• wherein the first pattern and the second pattern comprise indium oxide series binary metal oxide configured to be conductive material, and the MOS active layer comprises indium oxide series multiple MOS, and
• wherein the indium oxide series binary metal oxide comprises indium tin oxide (ITO), indium gallium oxide (IGO), or indium zinc oxide (IZO), and wherein the indium oxide series multiple MOS comprises metal doping ions comprising at least one kind of zinc ions (Zn2+), gallium ions (Ga3+), tin ions (Sn2+), aluminium ions (Al3+) and hafnium ions (Hf4+).