US 9,960,187 B2Granted

Electrical connection structure and thin film transistor array substrate including electrical connection structure

AssigneeHon Hai Precision Industry Co., Ltd.

InventorsChin-Yueh Liao, Chia-Lin Liu, Yan-Tang Dai, Hung-Che Lu

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Abstract

An electrical connection structure providing better optical properties in a display includes an electrical connection unit, an interference layer, and an electrically insulating cover. The interference layer is positioned on a side of the electrical connection unit. The electrically insulating cover is positioned on the other side of the electrical connection unit and formed to cover the electrical connection unit. The electrical connection unit includes a metal layer to reflect light. The interference layer can reflect light falling on a first region close to the electrically insulating cover. A degree of reflectance of the first region of the interference layer is equal to the reflectance of the metal layer.

Claims13

Dependent claims

A TFT array substrate comprising:

a thin film transistor;
a second interference layer positioned on a side of the thin film transistor;
and
an electrically insulating cover positioned on the other side of the thin film transistor away from the second interference layer and formed to cover the thin film transistor;
wherein the thin film transistor comprises a metal layer reflecting light, and wherein the thin film transistor is located between the second interference layer and the electrically insulating cover;
the second interference layer reflects light emitted from the electrically insulating cover towards a first side of the second interference layer, the first side of the second interference layer is adjacent to the electrically insulating cover, a reflectance of the first side of the second interference layer is equal to a reflectance of the metal layer.

3 more elements

Dependencies are inferred from the claim text.

Facts

Application: 15/139,552Filed 27 Apr 2016
Priority: TW 104117273 A29 May 2015
Published: US 2016/0351596 A11 Dec 2016
Granted: 1 May 2018
Term ends: Not estimatedThe source records don’t support an estimate.

Classification12 codes

H10D 86/60
Characterised by multiple TFTs: wherein the TFTs are in active matrices
H10D 30/6723
Having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device: having…
H10D 30/6732
Characterised by the shapes, relative sizes or dispositions of the gate electrodes: bottom-gate only TFTs
H10D 30/6737
Characterised by the electrodes: characterised by the electrode materials