Integrated semiconductor device having a level shifter
AssigneeInfineon Technologies AG
InventorsFranz Hirler, Andreas Meiser, Steffen Thiele
Life of this patent
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Abstract
An integrated semiconductor device is provided. According to an embodiment, the integrated semiconductor device includes a semiconductor body having a first surface with a normal direction defining a vertical direction, an opposite surface, a first area including a vertical power field-effect transistor structure, a second area including a three-terminal step-down level-shifter, and a third area including a three-terminal step-up level-shifter. A terminal of the vertical power field-effect transistor structure is electrically connected with one of the three-terminal step-down level-shifter and the three-terminal step-up level-shifter.
Claims14
An integrated semiconductor device, comprising:
- a semiconductor body comprising a first surface having a normal direction defining a vertical direction, an opposite surface, a first area comprising a vertical power field-effect transistor structure, a second area comprising a three-terminal step-down level-shifter, and a third area comprising a three-terminal step-up level-shifter,
- wherein a terminal of the vertical power field-effect transistor structure is electrically connected with one of the three-terminal step-down level-shifter and the three-terminal step-up level-shifter, and
- wherein the vertical power field-effect transistor structure, the three-terminal step-down level-shifter, and the three-terminal step-up level-shifter are disposed within the semiconductor body.
An integrated semiconductor device, comprising:
- a semiconductor body comprising a first surface having a normal direction defining a vertical direction, and an opposite surface;
- in a planar view, the integrated semiconductor device further comprising:
- a first area comprising a second metallization arranged on the first surface and forming a second load terminal;
- a second area comprising a level shifter comprising at least one first metallization arranged on the first surface;
- and
- a through contact area;
- in a vertical cross-section, the integrated semiconductor device further comprising:
- a common metallization arranged on the opposite surface in the first area, in the at least one second area and the through contact area, and forming a first load terminal;
- a first dielectric region extending between the first surface and the opposite surface;
- a second dielectric region extending between the first surface and the opposite surface;
- a conductive structure electrically connected with the first load terminal, extending to the first surface, and arranged in the through contact area and between the first dielectric region and the second dielectric region;
- a gate terminal arranged on the first surface;
- and
- a gate electrode for controlling a load current between the first load terminal and the second load terminal, the gate electrode being arranged in the first area and electrically connected with gate terminal.
Dependencies are inferred from the claim text.