Laterally diffused metal oxide semiconductor device integrated with vertical field effect transistor
AssigneeInternational Business Machines Corporation
InventorsBrent A. Anderson, Alain Loiseau
Life of this patent
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Abstract
An electrical device that in some embodiments includes a substrate including a lateral device region and a vertical device region. A lateral diffusion metal oxide semiconductor (LDMOS) device may be present in the lateral device region, wherein a drift region of the LDMOS device has a length that is parallel to an upper surface of the substrate in which the LDMOS device is formed. A vertical field effect transistor (VFET) device may be present in the vertical device region, wherein a vertical channel of the VFET has a length that is perpendicular to said upper surface of the substrate, the VFET including a gate structure that is positioned around the vertical channel.
Claims19
An electrical device comprising;
- a first semiconductor device in a lateral device region of a substrate, wherein a lateral channel region of the first semiconductor device is present in a first fin structure having a length that is parallel to an upper surface of a substrate in which the first semiconductor device is present, wherein the first semiconductor device includes a gate structure having a first thickness gate dielectric;
- and
- a second semiconductor device in a vertical device region of the substrate, wherein a vertical channel present in a second fin structure has a length that is perpendicular to said upper surface of the substrate, the second semiconductor device including a gate structure that is positioned around the vertical channel, wherein the second semiconductor device has a second thickness gate dielectric that is less than the first thickness gate dielectric, the gate structure of the VFET separated from a source/drain region of the VFET by a gate sidewall spacer on a same material level as the first thickness gate dielectric of the first semiconductor device.
An electrical device comprising:
- a substrate including a lateral device region and a vertical device region;
- a lateral diffusion metal oxide semiconductor (LDMOS) device in the lateral device region, wherein a drift region of the LDMOS device has a length that is parallel to an upper surface of the substrate;
- and
- a vertical field effect transistor (VFET) device in the vertical device region, the VFET comprising a first of a source region and a drain region provided by a doped portion of the substrate in the vertical device region, a vertical channel region, and a second of the source region and the drain region provided by an epitaxial semiconductor material.
An electrical device comprising:
- a lateral diffusion metal oxide semiconductor (LDMOS) device in a lateral device region of a substrate, wherein a drift region of the LDMOS device has a length that is parallel to an upper surface of the substrate, the LDMOS comprises a drift region gate dielectric formed on a drift region of the substrate;
- a fin gate dielectric present on a first fin structure;
- and an LDMOS gate structure present on the drift region gate dielectric and the fin gate dielectric;
- and
- a vertical field effect transistor (VFET) device in a vertical device region of the substrate, the VFET comprising a first of a source region and a drain region provided by a doped portion of the substrate in the vertical device region, a vertical channel region provided by a second fin structure, and a second of the source region and the drain region provided by an epitaxial semiconductor material.
Dependencies are inferred from the claim text.