Heat dissipation and series resistance reduction of PA and RF switch in SLT by backside thick metal

A device comprising:

• a metallization layer over a substrate;
• a device layer over the metallization layer;
• a buried oxide (BOX) layer over the device layer, the BOX layer having a thin portion in a power amplifier (PA) power cell region of the device and thick portions on opposite sides of the thin portion;
• a passivation oxide layer over the thick portions of the BOX layer;
• a pair of backside metal contacts laterally separated, each contact through the device layer, thick portions of the BOX layer, and passivation layer down to metal wiring of the metal layer, and one contact having a thick metal layer over the thin portion of the BOX layer.

A method comprising:

• providing a semiconductor-on-insulator (SOI) structure having a sequentially formed substrate, buried oxide (BOX) layer, device layer, and a metallization layer including copper (Cu) wiring and a passivation nitride fill;
• bonding a glass layer to an upper surface of the metallization layer;
• removing the substrate by a series of grinding and wet etching;
• forming a passivation oxide layer over the BOX layer;
• forming first and second trenches laterally separated through the passivation oxide, BOX, and device layers down to the Cu wiring;
• forming a third trench to a depth of 5000 angstrom (Å) to 60000 Å through the passivation oxide layer and a portion of the BOX layer between the first and second trenches and above a power amplifier (PA) power cell region of the SOI structure until 50 Å to 1000 Å of the BOX layer in the PA power cell region remains;
• and
• forming a first backside metal contact in the first trench and over a portion of the passivation oxide layer;
• and
• forming a second backside metal contact in the second and third trenches and over a portion of the passivation oxide layer.