Thermally enhanced semiconductor package with thermal additive and process for making the same

An apparatus comprising:

• a module substrate having an upper surface;
• a thinned flip chip die comprising:
• a device layer;
• a dielectric layer over an upper surface of the device layer;
• and
• a plurality of interconnects extending from a lower surface of the device layer and coupled to the upper surface of the module substrate;
• a first mold compound component residing over the upper surface of the module substrate, surrounding the thinned flip chip die, and extending above an upper surface of the thinned flip chip die to form a cavity over the upper surface of the thinned flip chip die, wherein the cavity includes a lower region and an upper region that resides over the lower region;
• and
• a thermally enhanced mold compound component comprising:
• a lower portion with a first average thermal conductivity, wherein the lower portion fills the lower region of the cavity and resides over the upper surface of the thinned flip chip die;
• and
• an upper portion with a second average thermal conductivity, wherein the upper portion fills the upper region of the cavity and resides over the lower portion, and the first average thermal conductivity of the lower portion is at least 1.2 times greater than the second average thermal conductivity of the upper portion.