US 9,960,086 B2 · Methods, apparatus and system for self-aligned retrograde well doping for finFET devices

Abstract

At least one method, apparatus and system are disclosed for forming a fin field effect transistor (finFET) having doping region self-aligned with a fin reveal position. A plurality of fins of a transistor is formed. A nitride cap layer on the plurality of fins is formed. An N-type doped region in a first portion of the plurality of fins. A P-type doped region in a second portion of the plurality of fins. A shallow trench isolation (STI) fill process for depositing an STI material on the plurality of fins. A fin reveal process for removing the STI material to a predetermined level. A cap strip process for removing the nitride cap layer for forming a fin reveal position that is self-aligned with the P-type and N-type doped regions.

Claims15

Dependent claims

A method, comprising:

forming a plurality of fins of a transistor;
forming a nitride cap layer on said plurality of fins;
forming an N-type doped region in a first portion of said plurality of fins;
forming a P-type doped region in a second portion of said plurality of fins;
performing a shallow trench isolation (STI) fill process for depositing an STI material on said plurality of fins;
performing a fin reveal process for removing said STI material to a predetermined level;
and
performing a cap strip process for removing said nitride cap layer for forming a fin reveal position that is self-aligned with said P-type and N-type doped regions.

5 more elements

A method, comprising:

forming a plurality of fins of a transistor;
forming an N-type doped region in a first portion of said plurality of fins for forming a PFET region;
forming a P-type doped region in a second portion of said plurality of fins for forming an NFET region;
and
forming an STI region that is self-aligned with said N-type and said P-type doped regions, wherein said STI region is a super steep retrograde well.

2 more elements

Dependencies are inferred from the claim text.

Facts

Application

15/274,974Filed 23 Sep 2016

Published

US 2018/0090391 A129 Mar 2018

Granted

1 May 2018

Term ends

Not estimatedThe source records don’t support an estimate.

Classification8 codes

H10D 84/038
Using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology: using silicon technology, e.g. SiGe
H10D 30/0241
Of fin field-effect transistors [FinFET]: doping of vertical sidewalls, e.g. using tilted or multi-angled implants
H10D 84/0188
The components including complementary IGFETs, e.g. CMOS devices: manufacturing their isolation regions
H10D 84/0191
The components including complementary IGFETs, e.g. CMOS devices: manufacturing their doped wells

Methods, apparatus and system for self-aligned retrograde well doping for finFET devices

Life of this patent

Methods, apparatus and system for self-aligned retrograde well doping for finFET devices

Life of this patent

Abstract

Claims15