Integrated bi-layer STI deposition

A method comprising:

• etching a semiconductor substrate to form trenches in the semiconductor substrate;
• depositing a first dielectric layer into the trenches, wherein the first dielectric layer fills lower portions of the trenches;
• performing a first post treatment on the first dielectric layer in an oxygen-containing process gas;
• after the first post treatment, depositing a second dielectric layer into the trenches, wherein the second dielectric layer fills upper portions of the trenches;
• performing a second post treatment on the second dielectric layer in an additional oxygen-containing process gas, wherein after the second post treatment, the first dielectric layer has a first reflective index, and the second dielectric layer has a second reflective index lower than the first reflective index;
• and
• after the second post treatment, performing an anneal on the first dielectric layer and the second dielectric layer.

A method comprising:

• etching a semiconductor substrate to form a trench extending into the semiconductor substrate;
• disposing a first dielectric layer into the trench using Flowable Chemical Vapor Deposition (FCVD);
• solidifying the first dielectric layer, wherein the solidified first dielectric layer has a recess, with the first dielectric layer having portions on opposite sides of, and level with, the recess;
• depositing a second dielectric layer into the recess using FCVD;
• solidifying the second dielectric layer;
• performing a planarization on the first dielectric layer and the second dielectric layer, with the first dielectric layer and the second dielectric layer forming a Shallow Trench Isolation (STI) region after the planarization;
• and
• recessing the first dielectric layer and the second dielectric layer.