Semiconductor device

A semiconductor device comprising:

• a first power source line for supplying a first voltage;
• a second power source line for supplying a second voltage;
• a memory circuit coupled with the first and second power source lines;
• and
• a first switch which electrically couples the first power source line with the second power source line and electrically decouples the first power source line from the second power source line, in response to a control signal,
• wherein the memory circuit includes
• a memory array coupled with the second power source line,
• a peripheral circuit coupled with the first power source line, and
• a second switch which electrically couples the first power source line with the second power source line and electrically decouples the first power source line from the second power source line, in response to the control signal, and
• wherein the first and second switches each includes
• a first PMOS transistor arranged in a first N-type well, a source of the first PMOS transistor coupled to the first power source line, and
• a second PMOS transistor arranged in a second N-type well, a source of the second PMOS transistor coupled to the second power source line and a drain of the second PMOS transistor is to be coupled to a drain of the second PMOS transistor, and
• wherein the first N-type well is electrically separated with the second N-type well.