Apparatuses and methods to reverse data stored in memory

An apparatus, comprising:

• an array including a first memory cell, a second memory cell, a third memory cell, and a fourth memory cell;
• a first shared input/output (SIO) line and a second SIO line;
• a first sensing component, a second sensing component, a third sensing component, and a fourth sensing component, wherein each of the first, second, third, and fourth sensing components are coupled to a corresponding first, second, third, and fourth memory cell;
• a first select device coupled between the first sensing component and the first SIO line;
• a second select device coupled between the second sensing component and the second SIO line;
• a third select device coupled between the third sensing component and the first SIO line;
• and
• a fourth select device coupled between the fourth sensing component and the second SIO line, wherein
• the first and second memory cells are assigned logical index information in a first logical sequence, and the third and fourth memory cells are assigned logical index information in a second logical sequence opposite to the first logical sequence.

A method, comprising:

• sensing, via a first plurality of sensing components each corresponding to one of a respective first plurality of columns of an array, a respective first plurality of memory cells coupled to a first access line of the array, wherein the data stored in the first plurality of memory cells is stored in accordance with a particular logical sequence;
• transferring, via a plurality of shared input/output (SIO) lines, the sensed data from the first plurality of sensing components to a second plurality of sensing components each corresponding to one of a respective second plurality of columns of the array, wherein the plurality of shared SIO lines are shared by the first plurality of sensing components and the second plurality of sensing components;
• transferring the sensed data from the second plurality of sensing components to a respective second plurality of memory cells coupled to a second access line of the array;
• wherein a logical sequence of the data transferred to the second plurality of memory cells is a reverse of the particular logical sequence.

A method, comprising:

• reversing a logical sequence of data stored in a group of memory cells coupled to a first access line of an array by performing a plurality of transfer operations via a plurality of shared input/output (SIO) lines;
• wherein the array comprises a first plurality of sensing components corresponding to a respective first plurality of columns of the array and a second plurality of sensing components corresponding to a respective second plurality of columns of the array;
• and
• wherein each one of the plurality of SIO lines is selectively coupled to a respective subset of the first plurality of sensing components and to a respective subset of the second plurality of sensing components.