Output timing control circuit of semiconductor apparatus and method thereof
AssigneeSK hynix Inc.
InventorDong Uk Lee
Life of this patent
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Abstract
An output timing control circuit of a semiconductor apparatus may include a strobe signal generation path configured to control a latency and a delay time of an internal signal, and generate a strobe signal. The output timing control circuit may include a first detection block configured to detect a phase difference of the strobe signal and a clock signal, and control the delay time according to the detected phase difference. The output timing control circuit may include a second detection block configured to detect a latency difference of the strobe signal and the internal signal, and control the latency according to the detected latency difference. The internal signal may be generated according to a preset timing of a command received by the strobe signal generation path.
Claims20
An output timing control circuit of a semiconductor apparatus, comprising:
- a strobe signal generation path configured to control a latency and a delay time of an internal column address strobe in response to a delay control signal and latency compensation codes, and generate a strobe signal;
- a first detection block configured to detect a phase difference of the strobe signal and a clock signal, and generate the delay control signal according to the detected phase difference;
- a second detection block configured to detect a latency difference of the strobe signal and the internal column address strobe, and generate the latency compensation codes according to the detected latency difference;
- and
- a control block configured to generate the command according to a preset timing.
An output timing control circuit of a semiconductor apparatus, comprising:
- a strobe signal generation path configured to control a phase of an internal column address strobe generated according to a read command, in response to a delay control signal, control a latency of the internal signal in response to a read latency and latency compensation codes, and generate a strobe signal;
- a first detection block configured to detect a phase difference of a feedback strobe signal and a delayed clock signal, and generate the delay control signal according to the detected phase difference;
- a second detection block configured to detect a latency difference of the feedback strobe signal and the internal column address strobe, and generate the latency compensation codes according to the detected latency difference;
- and
- a control block configured to generate the read command based on a mode register set signal.
An output timing control method of a semiconductor apparatus, comprising:
- a phase difference detecting action of detecting a phase difference of a strobe signal and a clock signal;
- a phase controlling action of controlling a phase of the strobe signal according to the phase difference;
- a latency detecting action of detecting latency compensation codes for compensating for a latency difference of an internal column address strobe and the strobe signal;
- and
- a latency controlling action of controlling a read latency according to the latency compensation codes.
Dependencies are inferred from the claim text.