Memory controller having plurality of channels that provides simultaneous access to data when accessing unified graphics memory

An apparatus comprising:

• a unified system/graphics memory;
• and
• a memory controller, operatively coupled to the unified system/graphics memory, the memory controller operative to receive client data access requests associated with one or more clients and a central processing unit (CPU) data access request associated with a CPU, to a plurality of memory channels for accessing the unified system/graphics memory, wherein the memory controller is operative to provide access to the plurality of memory channels, simultaneously, by the CPU and at least one client of the one or more clients,
• the memory controller operative to prioritize the CPU data access request to the unified memory over the client data access requests to the unified memory and operative to control the plurality of memory channels to access, simultaneously, data for the CPU and data for the at least one client based on a request of the client data access requests and the CPU data access request.