Supporting configurable security levels for memory address ranges

A method, comprising:

• responsive to detecting a memory access operation with respect to a memory location identified by a memory address within a memory address range associated with an off-chip memory, identifying, using a processing device, a security level indicator associated with the memory location based on a value stored on a security range register, wherein the security level indicator identifies at least one of:
• an encryption-only memory range or a full-protection memory range of the off-chip memory;
• and
• accessing, using the processing device, at least a portion of a data item associated with the memory address range of the off-chip memory in view of the security level indicator.

A computer-readable non-transitory storage medium comprising executable instructions that, when executed by a processing device, cause the processing device to:

• responsive to detecting a memory access operation with respect to a memory location identified by a memory address within a memory address range associated with the off-chip memory, identify, by the processing device, a security level indicator associated with the memory location based on a value stored on a security range register, wherein the security level indicator identifies at least one of:
• an encryption-only memory range or a full-protection memory range of the off-chip memory;
• and
• access at least a portion of a data item associated with the memory address range of the off-chip memory in view of the security level indicator.