Message passing among interdependent parallel processes using a shared memory
AssigneeEMC IP Holding Company LLC
InventorsJohn M. Bent, Sorin Faibish, James M. Pedone, Jr.
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Abstract
Message passing is provided among a plurality of interdependent parallel processes using a shared memory. Inter-process communication among a plurality of interdependent processes executing on a plurality of compute nodes is performed by obtaining a message from a first process for a second process; and storing the message in a memory location of a Peripheral Component Interconnect Express (PCIE)-linked storage device, wherein the second process reads the memory location to obtain the message. The message is optionally persistently stored in the PCIE-linked storage device for an asynchronous checkpoint until the message is no longer required for an asynchronous restart.
Claims20
A method for inter-process communication among a plurality of interdependent processes executing on a plurality of compute nodes, comprising:
- obtaining a message by means of a Peripheral Component Interconnect Express (PCIE) network interconnecting a plurality of compute nodes, wherein said message is from a first process executing on a first compute node of the plurality of compute nodes for a second process executing on a distinct second compute node of the plurality of compute nodes;
- and
- storing said message in a predefined persistent memory location of a PCIE-linked persistent storage device that is distinct from said first compute node and said second compute node, wherein said second process reads said predefined persistent memory location using a PCIE communication to obtain said message from said predefined persistent memory location.
A non-transitory machine-readable recordable storage medium, wherein one or more software programs when executed by one or more processing devices implement the following steps:
- obtaining a message by means of a Peripheral Component Interconnect Express (PCIE) network interconnecting a plurality of compute nodes, wherein said message is from a first process executing on a first compute node of the plurality of compute nodes for a second process executing on a distinct second compute node of the plurality of compute nodes;
- and
- storing said message in a predefined persistent memory location of a PCIE-linked persistent storage device that is distinct from said first compute node and said second compute node, wherein said second process reads said predefined persistent memory location using a PCIE communication to obtain said message from said predefined persistent memory location.
A system for inter-process communication among a plurality of interdependent processes executing on a plurality of compute nodes, comprising:
- a memory;
- and
- at least one processing device configured to:
- obtain a message by means of a Peripheral Component Interconnect Express (PCIE) network interconnecting a plurality of compute nodes, wherein said message is from a first process executing on a first compute node of the plurality of compute nodes for a second process executing on a distinct second compute node of the plurality of compute nodes;
- and
- store said message in a predefined persistent memory location of a PCIE-linked persistent storage device that is distinct from said first compute node and said second compute node, wherein said second process reads said predefined persistent memory location using a PCIE communication to obtain said message from said predefined persistent memory location.
Dependencies are inferred from the claim text.