Memory tile access and selection patterns
AssigneeMicron Technology, Inc.
InventorsHernan A. Castro, Kerry Dean Tedrow, Jack Chinho Wu
Life of this patent
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Abstract
In one embodiment, an apparatus, such as a memory device, is disclosed. The apparatus includes multiple memory tiles and selection circuitry. Each memory tile has an array of storage components at intersections of a plurality of digit line conductors and a plurality of access line conductors. The selection circuitry includes line drivers that select a storage component of a memory tile based on a corresponding digit line conductor and a corresponding access line conductor to the storage component. The selection circuitry may select two or more storage components of a memory tile in a consecutive manner before selecting the storage components of a different memory tile.
Claims20
A method comprising:
- dividing a memory tile of a memory device into a plurality of memory patches, each memory patch comprising a set of storage components;
- assigning a first subset of storage components of a first memory patch of the plurality of memory patches to a first group;
- assigning a second subset of storage components of the first memory patch to a second group different than the first group;
- and
- selecting multiple storage components from the first subset of storage components before selecting one or more storage components from the second subset of storage components, wherein the multiple storage components from the first subset of storage components correspond to different digit line conductors and different access line conductors, and the selecting the multiple storage components from the first subset of storage components being based at least in part on an access pattern.
An apparatus comprising:
- a memory device;
- a memory controller in electronic communication with the memory device, the memory controller configured to:
- assign a plurality of memory cells of a memory tile of the memory device to a plurality of groups, wherein at least two memory cells assigned to a first group of the plurality of groups comprise different digit line conductors and different access line conductors;
- assign at least two groups of the plurality of groups to a first class of a set of classes;
- and
- select multiple memory cells associated with the first class based at least in part on a selection pattern, wherein the multiple memory cells of the first class are selected before selection of a memory cell associated with a second class of the set of classes.
A memory device comprising:
- a set of memory tiles, each having a plurality of memory storage components;
- a controller configured to:
- assign a set of memory storage components of a first memory tile of the set of memory tiles to respective groups, wherein at least two memory storage components from the set of memory storage components is associated with a same digit line conductor, a same access line conductor, and a different access circuit;
- assign classes to each of the respective groups;
- and
- select memory storage components of the first memory tile according to the assigned classes.
Dependencies are inferred from the claim text.