Emulated translation unit using a management processor
AssigneeAmazon Technologies, Inc.
InventorsAdi Habusha, Leah Shalev, Nafea Bshara
Life of this patent
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Abstract
An emulated input/output memory management unit (IOMMU) includes a management processor to perform page table translation in software. The emulated IOMMU can also include a hardware input/output translation lookaside buffer (IOTLB) to store translations between virtual addresses and physical memory addresses. When a translation from a virtual address to a physical address is not found in the IOTLB for an I/O request, the translation can be generated by the management processor using page tables from a memory and can be stored in the IOTLB. Some embodiments can be used to emulate interrupt translation service for message based interrupts for an interrupt controller.
Claims21
A system comprising:
- a plurality of processors, wherein a first processor is configured to execute a hypervisor to manage a plurality of virtual machines;
- a hardware input/output translation lookaside buffer (IOTLB) for storing translations between virtual addresses and physical addresses;
- a memory communicatively coupled to the first processor and to the IOTLB, wherein the memory comprises page tables for generating the translations between the virtual addresses and the physical addresses;
- and
- a second processor communicatively coupled to the IOTLB and to the memory, the second processor configured to execute firmware configured to:
- generate the translations between the virtual addresses and the physical addresses using the page tables from the memory for storing in the IOTLB;
- and
- manage the IOTLB by executing operations including invalidation of an entry of the IOTLB, exception handling for the IOTLB, and context switching between address spaces associated with different virtual machines from the plurality of virtual machines, wherein the context switching includes pre-loading the IOTLB with a set of translations for a current address space.
A system comprising:
- a plurality of processors, wherein a first processor is configured to execute a hypervisor, the hypervisor configured to support a plurality of contexts for a plurality of virtual spaces;
- a translation cache for storing translations between a virtual space from the plurality of virtual spaces and a physical space;
- a memory communicatively coupled to the first processor, wherein the memory comprises page tables for generating the translations between the virtual space and the physical space;
- and
- a second processor communicatively coupled to the memory and to the translation cache, the second processor configured to execute instructions stored in a computer readable medium that cause the second processor to:
- manage the translation cache to perform context switching from a first context associated with a first virtual space from the plurality of virtual spaces to a current context associated with a current virtual space from the plurality of virtual spaces, wherein performing the context switching includes pre-loading the translation cache with a set of translations for the current context;
- receive a request for a translation from the current virtual space to the physical space, wherein the translation is not already in the translation cache;
- generate the translation using the page tables;
- and
- store the translation for the request in the translation cache.
A method comprising:
- receiving, by a first processor from processors in a system, a request for a translation from a current virtual space from a plurality of virtual spaces to a physical space upon a determination that the translation for the request does not reside in a hardware translation cache communicatively coupled to the first processor, wherein the hardware translation cache is configured to store translations between a virtual space and the physical space, wherein a second processor from the processors is configured to execute a hypervisor, the hypervisor configured to support a plurality of contexts for the plurality of virtual spaces, and wherein the fir processor is configured to manage the hardware translation cache to perform context switching from a first context associated with a first virtual space to a current context associated with the current virtual space, wherein the context switching includes pre-loading the hardware translation cache with a set of translations for the current context,
- generating the translation for the request using page tables from a memory, wherein the memory is communicatively coupled to the first processor;
- and
- storing the translation for the request in the hardware translation cache.
Dependencies are inferred from the claim text.