Memory control unit for controlling semiconductor memory device and data storage apparatus including the same
AssigneeSK hynix Inc.
InventorsJae Hyeong Jeong, Joong Hyun An, Kwang Hyun Kim, Jae Woo Kim
Life of this patent
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Abstract
The memory control unit includes a descriptor fetch block suitable for fetching a descriptor from a volatile memory; an instruction fetch block suitable for fetching an instruction set from an instruction memory through an address information, wherein the instruction fetch block obtains the address information from the instruction memory through an index information included in the fetched descriptor; and a memory instruction generation block suitable for generating a memory instruction by combining a descriptor parameter value included in the fetched descriptor to the fetched instruction set.
Claims17
A memory control unit comprising:
- a descriptor fetch block configured to fetch a descriptor, which describes a work for controlling a nonvolatile memory device, from a volatile memory;
- an instruction fetch block configured to fetch an instruction set from an instruction memory through an address information, wherein the instruction fetch block obtains the address information from the instruction memory through an index information included in the fetched descriptor;
- a memory instruction generation block configured to generate a memory instruction by combining a descriptor parameter value included in the fetched descriptor with the fetched instruction set;
- and
- a direct memory access (DMA) block configured to directly access the volatile memory,
- wherein the descriptor fetch block includes:
- a descriptor queue configured to store an identification (ID) of the descriptor;
- and
- a descriptor fetch logic configured to fetch the ID of the descriptor from the descriptor queue, obtain a descriptor address of the volatile memory from the fetched ID of the descriptor, and request the DMA block to read out the descriptor corresponding to the obtained descriptor address from the volatile memory.
A data storage apparatus comprising:
- a nonvolatile memory device;
- a control unit configured to generate a descriptor, which describes a work for controlling the nonvolatile memory device, and storing the descriptor in a volatile memory;
- and
- a memory control unit including an instruction memory storing an instruction set, and configured to obtain an address information, which corresponds to an instruction set to be fetched from the instruction memory, from the instruction memory through an index information included in the descriptor,
- wherein the address information includes:
- a first address information comprising a plurality of index address information;
- and
- a plurality of second address information each comprising a start address and a count value for the instruction set within an instruction set region of the instruction memory,
- wherein the first address information are indicated by the index information, and
- wherein the plurality of second address information are indicated by the plurality of index address information of the first address information, respectively.
Dependencies are inferred from the claim text.